Patents by Inventor Tatsuji Ishiduka

Tatsuji Ishiduka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CHIP-ON-CHIP STRUCTURE AND MANUFACTURING METHOD THEROF
    Publication number: 20120104597
    Abstract: According to an embodiment, a chip-on-chip structure includes a first chip, a second chip, the first chip and the second chip being opposite to each other, a first electrode terminal, a second electrode terminal, a bump and a protecting material. The first electrode terminal is provided on the surface of the first chip at the side of the second chip. The second electrode terminal is provided on the surface of the second chip at the side of the first chip. The bump electrically connects the first electrode terminal and the second electrode terminal. The protecting material is formed around the bump between the first chip and the second chip. The protecting material includes a layer made of a material having heat-sensitive adhesive property.
    Type: Application
    Filed: March 23, 2011
    Publication date: May 3, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsuji Ishiduka, Junji Yoshikawa, Tsutomu Kojima