Abstract: A Tu delay section delays an analog-to-digital converted OFDM signal S01 by a time corresponding to an effective symbol period Tu. A correlation signal of an output of the Tu delay section and OFDM signal S01 is obtained using a correlation calculating section. A delay section outputs at least one delayed correlation signal obtained by delaying a correlation signal S02. Next, an adding section performs addition of the correlation signal S02 and the delayed correlation signal, and then an interval integration section performs transfer integration over a definite interval on a result of the addition. Then, a symbol period smoothing section smoothes a result of the transfer integration for an interval of the effective symbol period of the OFDM signal S01, and then a window position detection section calculates window position information from an output of the symbol period smoothing section.

Abstract: A Tu delay section (110) delays an analog-to-digital converted OFDM signal S01 by a time corresponding to an effective symbol period Tu. A correlation signal of an output of the Tu delay section (110) and OFDM signal S01 is obtained using a correlation calculating section (120). A delay section (130) outputs at least one delayed correlation signal obtained by delaying a correlation signal S02. Next, an adding section (140) performs addition of the correlation signal S02 and the delayed correlation signal, and then an interval integration section (150) performs transfer integration over a definite interval on a result of the addition. Then, a symbol period smoothing section (160) smoothes a result of the transfer integration for an interval of the effective symbol period of the OFDM signal S01, and then a window position detection section (170) calculates window position information from an output of the symbol period smoothing section (160).

Abstract: A Tu delay section (110) delays an analog-to-digital converted OFDM signal S01 by a time corresponding to an effective symbol period Tu. A correlation signal of an output of the Tu delay section (110) and OFDM signal S01 is obtained using a correlation calculating section (120). A delay section (130) outputs at least one delayed correlation signal obtained by delaying a correlation signal S02. Next, an adding section (140) performs addition of the correlation signal S02 and the delayed correlation signal, and then an interval integration section (150) performs transfer integration over a definite interval on a result of the addition. Then, a symbol period smoothing section (160) smoothes a result of the transfer integration for an interval of the effective symbol period of the OFDM signal S01, and then a window position detection section (170) calculates window position information from an output of the symbol period smoothing section (160).

Abstract: A phase error correction circuit includes a complex phase rotator for multiplying an input VSB (vestigial-sideband) signal by a phase correction signal and outputting a resultant signal, a specific frequency component elimination filter for eliminating a specific frequency component from the signal output from the complex phase rotator and outputting a resultant signal, a waveform equalizer for performing waveform distortion correction to the signal output from the specific frequency component elimination filter and outputting a resultant signal and a phase correction signal generator for detecting a phase error based on the signal output from the waveform equalizer and outputting a complex signal corresponding to the detected phase error as the phase correction signal.

Abstract: A terminal apparatus of a communication system is provided with an MAC section (bidirectional communication apparatus), a PHY section, a tuner, and a back-end section. The MAC section comprises a downstream data processing block having a function of substituting for a portion of the process of the CPU, a upstream data processing block having a function of substituting for a portion of the process of the CPU, a bus data arbitration processing block, a CPU bus, the CPU, and a storage apparatus. The downstream data processing block and the upstream data processing block perform direct data transmission/reception while bypassing the CPU bus.

Abstract: A phase error correction circuit includes a complex phase rotator for multiplying an input VSB (vestigial-sideband) signal by a phase correction signal and outputting a resultant signal, a specific frequency component elimination filter for eliminating a specific frequency component from the signal output from the complex phase rotator and outputting a resultant signal, a waveform equalizer for performing waveform distortion correction to the signal output from the specific frequency component elimination filter and outputting a resultant signal and a phase correction signal generator for detecting a phase error based on the signal output from the waveform equalizer and outputting a complex signal corresponding to the detected phase error as the phase correction signal.

Abstract: A terminal apparatus of a communication system is provided with an MAC section (bidirectional communication apparatus), a PHY section, a tuner, and a back-end section. The MAC section comprises a downstream data processing block having a function of substituting for a portion of the process of the CPU, a upstream data processing block having a function of substituting for a portion of the process of the CPU, a bus data arbitration processing block, a CPU bus, the CPU, and a storage apparatus. The downstream data processing block and the upstream data processing block perform direct data transmission/reception while bypassing the CPU bus.