Patents by Inventor Tatsuki Inuzuka

Tatsuki Inuzuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050012754
    Abstract: A control device, which is capable of suppressing an increase in a load of a data transfer for an increase of an amount of data is provided. The control-device includes a compressed data generation unit for generating a compressed data based on a set-up value inputted, and a controller for outputting a frame rate-information to the compressed data generation unit, and for making compressed data to be outputted from a memory for use in storing a compressed data to an image display device in accordance with the frame rate.
    Type: Application
    Filed: August 12, 2004
    Publication date: January 20, 2005
    Inventors: Tatsuki Inuzuka, Tsunenori Yamamoto, Ikuo Hiyama, Makoto Tsumura, Yasutaka Toyoda
  • Patent number: 6784891
    Abstract: A control device, which is capable of suppressing an increase in a load of a data transfer for an increase of an amount of data is provided. The control device includes a compressed data generation unit for generating a compressed data based on a set-up value inputted, and a controller for outputting a frame rate information to the compressed data generation unit, and for making compressed data to be outputted from a memory for use in storing a compressed data to an image display device in accordance with the frame rate.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: August 31, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuki Inuzuka, Tsunenori Yamamoto, Ikuo Hiyama, Makoto Tsumura, Yasutaka Toyoda
  • Patent number: 6731400
    Abstract: A data processing part in a printer controller performs multivalued dither processing whereby image data is processed for images of characters and thin lines with a high definition, and for pictures with a high color gradation, and the image quality deterioration at the boundary region between an edge region and a non-edge region can be avoided. The data processing part performs discrimination of an edge region, a non-edge region, and a boundary region between the edge and non-edge regions. Furthermore, the data processing part performs multivalued dither processing by using a prepared dot distribution type dither matrix for the edge region, a prepared dot concentration type dither matrix for the non-edge region and a prepared dot distribution and concentration mixing type dither matrix for the boundary region.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: May 4, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Nakamura, Manabu Joh, Tatsuki Inuzuka
  • Patent number: 6717583
    Abstract: In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: April 6, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka, Yasuhiro Nakatsuka
  • Publication number: 20040056865
    Abstract: In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.
    Type: Application
    Filed: September 25, 2003
    Publication date: March 25, 2004
    Inventors: Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka, Yasuhiro Nakatsuka
  • Publication number: 20020118183
    Abstract: A control device, which is capable of suppressing an increase in a load of a data transfer for an increase of an amount of data is provided. The control device includes a compressed data generation unit for generating a compressed data based on a set-up value inputted, and a controller for outputting a frame rate information to the compressed data generation unit, and for making compressed data to be outputted from a memory for use in storing a compressed data to an image display device in accordance with the frame rate.
    Type: Application
    Filed: August 31, 2001
    Publication date: August 29, 2002
    Inventors: Tatsuki Inuzuka, Tsunenori Yamamoto, Ikuo Hiyama, Makoto Tsumura, Yasutaka Toyoda
  • Publication number: 20020118158
    Abstract: A display apparatus includes pixels arranged in matrix; a pixel electrode disposed inside each of the pixels; a display device disposed inside each of the pixels, for executing display in accordance with a voltage of the pixel electrode; a scanning line driving circuit; an identification signal line driving circuit; a storage unit for storing the identification signal supplied from the identification signal line in the pixel; a gray scale voltage line driving circuit; a selection unit for selecting the gray scale voltage supplied to the gray scale voltage lines based on the identification signal stored in the storage unit; a switching device for applying the selected gray scale voltage to the pixel electrode; and a gray scale write line driving circuit for supplying a gray scale write signal to a gray scale write line for controlling the switching device.
    Type: Application
    Filed: August 22, 2001
    Publication date: August 29, 2002
    Inventors: Tsunenori Yamamoto, Tatsuki Inuzuka, Ikuo Hiyama, Shinichi Komura
  • Patent number: 6437825
    Abstract: An image signal processing apparatus to realize signal processing system and apparatus constitution, where an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor is obtained in circuit constitution of small scale with high picture quality. In order to solve the problems, data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is made b+f+j≦8 per one pixel. Or error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is made b+f+j′≦8, data width per one pixel being made j′=j/N. Image signal processing is realized in this constitution, thereby data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying accuracy of signal processing sufficiently and having high picture quality can be obtained.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: August 20, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuki Inuzuka, Toshiaki Nakamura, Shinichi Shinoda, Yasuyuki Kojima
  • Publication number: 20020105506
    Abstract: To provide a display device capable of displaying a moving picture with high definition and at high speed. An image display system includes: an image display unit; and a control unit. The control unit has: a block discrimination circuit portion; an image processing portion; a storage portion; and a synchronizing signal generation portion. The block discrimination circuit portion discriminates a moving picture or a still picture to process the image information in accordance with the discriminated result, in which the number of gradations for the image information processed when the discriminated result is the moving picture is lower than when the discriminated result is the still picture. Thereby, the high definition image display and the high speed moving picture display can be effected by reducing the information with lower degree of recognition.
    Type: Application
    Filed: September 24, 2001
    Publication date: August 8, 2002
    Inventors: Ikuo Hiyama, Tsunenori Yamamoto, Akitoyo Konno, Makoto Tsumura, Yoshiyuki Kaneko, Yoshiro Mikami, Tatsuki Inuzuka, Yasutaka Toyoda
  • Publication number: 20020080239
    Abstract: An electronic device capable of displaying and recording an input image includes an image sensor. A position information detector processes the image imaged by the image sensor and calculates movement information of the image sensor itself or movement information of a subject imaged by the image sensor. The electronic device can input hand-written characters and graphics without adding afresh a mouse or a tablet.
    Type: Application
    Filed: March 5, 2001
    Publication date: June 27, 2002
    Inventors: Mitsuji Ikeda, Tatsuki Inuzuka, Soshiro Kuzunuki, Keisuke Nakashima, Kenjiro Fujii
  • Patent number: 6404930
    Abstract: An apparatus is provided for expanding, decompressing and editing signals, and particularly a signal processing equipment for printing or displaying images. The apparatus includes compression device for image data, storing device for storing the compression data, decompression device, and editing device for editing, using only signals for editing, wherein the transfer of the data between the device is executed using the compression data.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: June 11, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuki Inuzuka, Toshiaki Nakamura, Kouzou Nakamura, Keisuke Nakashima
  • Publication number: 20020030688
    Abstract: An object of the present invention is to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer.
    Type: Application
    Filed: November 26, 2001
    Publication date: March 14, 2002
    Inventors: Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka, Yasuhiro Nakatsuka
  • Patent number: 6333745
    Abstract: In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory is generated from the CPU, the memory controller holds it once, requests the display controller to stop the access to the memory which is in execution, when data to the access executed already is transferred from the memory, holds it, and transfers the access request from the CPU bus which is held by the memory. When the access from the CPU bus ends, the memory controller restarts the access stopped in the display controller and passes the held data to the display controller.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: December 25, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Shimomura, Shigeru Matsuo, Koyo Katsura, Tatsuki Inuzuka, Yasuhiro Nakatsuka
  • Publication number: 20010043747
    Abstract: There is disclosed an apparatus for expanding, decompressing and editing signals, and particularly disclosed is a signal processing equipment for printing or displaying images. The apparatus comprises compression means for image data, storing means for storing the compression data, decompression means, and editing means for editing, using only signals for edition, wherein the transfer of the data between the means is executed by the compression data.
    Type: Application
    Filed: October 7, 1997
    Publication date: November 22, 2001
    Inventors: TATSUKI INUZUKA, TOSHIAKI NAKAMURA, KOUZOU NAKAMURA, KEISUKE NAKASHIMA
  • Patent number: 6204933
    Abstract: A personal computer has a print image developing means and a data compression means including a fixed rate compression. A color printer has a data extension means, a color correction means, a gamma correction means, a first halftoning means, an image area segmentation means, and a second halftoning means. The transmission time of a print image can be shortened necessarily to less than a constant time, and further, since an enormous memory for extension is unnecessary, a low cost printer can be provided.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: March 20, 2001
    Assignees: Hitachi, Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Eiji Yoshino, Hitoshi Tamura, Akira Sasaki, Hiroyuki Tadokoro, Nobuo Suzuki, Tatsuki Inuzuka, Atsushi Onose, Tatsunari Satoo, Takeshi Shibuya, Tadashi Okada, Masayuki Kanda, Naoyuki Urata
  • Patent number: 6191868
    Abstract: In a halftoning unit of a laser printer and the like, a high speed, high density and high gradations halftoning is realized by multi-value implementation by clustered dot concentrated dither halftoning (known as a sub-matrix method) and PWM distributing gradation among the plurality of halftone dots with a small memory and circuit. For this purpose, the value of the difference between an input gradation value ni and a threshold value nc, &Dgr;n=ni−nc, is shortened within a range of 0 to &Dgr;h and the lower s bit of &Dgr;h is removed by a round-down or round-up process. Meanwhile, a threshold array is generated from an extended threshold pattern obtained by combining threshold patterns of 2s whose threshold interval is &Dgr;h, i.e. &Dgr;Ah×K, &Dgr;h×K+1, . . . , &Dgr;×K+2(s−1). Thereby, a halftone dot dither process in which the PWM gradation increases distributively among the 2s dots may be realized with a small scale memory and circuit.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: February 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Shibuya, Tadashi Okada, Masayuki Kanda, Eiji Yoshino, Atsushi Onose, Tatsuki Inuzuka, Toshiaki Nakamura
  • Patent number: 5812274
    Abstract: An image signal processing apparatus to realize signal processing system and apparatus constitution, where an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor is obtained in circuit constitution of small scale with high picture quality. In order to solve the problems, data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is made b+f+j.ltoreq.8 per one pixel. Or error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is made b+f+j'.ltoreq.8, data width per one pixel being made j'=j/N. Image signal processing is realized in this constitution, thereby data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying accuracy of signal processing sufficiently and having high picture quality can be obtained. For example, when a circuit is constituted by LSI, the memory section can be easily mounted on the same LSI.
    Type: Grant
    Filed: May 30, 1996
    Date of Patent: September 22, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuki Inuzuka, Toshiaki Nakamura, Shinichi Shinoda, Yasuyuki Kojima
  • Patent number: 5649031
    Abstract: An image information processor for producing a high-quality output image by emphasizing the contour portions of a character, a photograph and others and by preventing the generation of a Moire patterns in a dot region, for preventing an increase in the amount of codes, and for making it unnecessary to set desired binarization processing for each original, is provided. The processor includes a unit for scanning the original to convert each pixel data into an electric signal, a unit for controlling the start of image processing, a filter for carrying out enhancement processing among a plurality of pixels arranged in oblique directions after smoothing processing has been carried out among a plurality of contiguous pixels arranged in scanning and traverse directions, and a unit for carrying out at least one of binarization and binarization capable of realizing pseudo tone expression.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: July 15, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Nakamura, Keisuke Nakashima, Kouzou Nakamura, Shinichi Shinoda, Tatsuki Inuzuka
  • Patent number: 5555095
    Abstract: An image signal processing apparatus to realize a signal processing system and apparatus constitution, where an image signal inputted using a photoelectric conversion element, such as a CCD or a contact type image sensor, is obtained in a circuit of small scale with high picture quality. In order to solve various problems, data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is made b+f+j.ltoreq.8 per one pixel, the error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is made b+f+j'.ltoreq.8, the data width per one pixel being j'=j/N. Image signal processing is realized in this constitution, whereby the data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying the accuracy of signal processing sufficiently and having a high picture quality can be obtained.
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: September 10, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuki Inuzuka, Toshiaki Nakamura, Shinichi Shinoda, Yasuyuki Kojima
  • Patent number: 5307088
    Abstract: Three chrominance signals representative of a color image are represented by a coordinate system in a uniform color space, and a probability of occurrence of colors on the color space and a correlation of the chrominance signals for pixels are referenced in encoding color image information signals.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: April 26, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuki Inuzuka, Kiyohiko Tanno, Yasuyuki Kozima