Patents by Inventor Tatsuki Kojima

Tatsuki Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9559063
    Abstract: A semiconductor device includes an interlayer insulating layer disposed over a semiconductor substrate, and including a plurality of wiring layers; a seal ring disposed in the interlayer insulating layer, and surrounding a circuit region of the semiconductor substrate; a crack lead ring disposed in the interlayer insulating layer, and surrounding the seal ring; and a protective film disposed over the interlayer insulating layer, and covering the crack lead ring and the seal ring. The crack lead ring includes an uppermost wiring layer in an uppermost layer of a plurality of wiring layers. When the crack lead ring has a wiring in an underlayer below the uppermost layer, the uppermost layer wiring extends towards the outside of the device, relative to the wiring in the underlayer. The protective film has an end overlapped with an end of the uppermost layer wiring to form a step over the interlayer insulating layer.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: January 31, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Takeshi Watanabe, Junya Ishii, Hirofumi Saitou, Hiroyasu Kitajima, Tatsuki Kojima, Yoshitsugu Kawashima
  • Publication number: 20140027928
    Abstract: A semiconductor device an interlayer insulating layer disposed over a semiconductor substrate, and including a plurality of wiring layers; a seal ring disposed in the interlayer insulating layer, and surrounding a circuit region of the semiconductor substrate; a crack lead ring disposed in the interlayer insulating layer, and surrounding the seal ring; and a protective film disposed over the interlayer insulating layer, and covering the crack lead ring and the seal ring. The crack lead ring includes an uppermost wiring layer in an uppermost layer of a plurality of wiring layers. When the crack lead ring has a wiring in an underlayer below the uppermost layer, the uppermost layer wiring extends towards the outside of the device, relative to the wiring in the underlayer. The protective film has an end overlapped with an end of the uppermost layer wiring to form a step over the interlayer insulating layer.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 30, 2014
    Inventors: Takeshi WATANABE, Junya ISHII, Hirofumi SAITOU, Hiroyasu KITAJIMA, Tatsuki KOJIMA, Yoshitsugu KAWASHIMA
  • Publication number: 20080293198
    Abstract: A manufacturing method of a semiconductor device includes the step for forming a silicon nitride film having a first part where arsenic is included and a second part where less amount of or substantially no arsenic is included, the step for removing at least a portion of the first part by dry etching, and the step for removing at least a portion of the second part by wet etching. Since arsenic in the silicon nitride film is removed by dry etching, arsenic is never eluted into the wet etching liquid from the silicon nitride film during subsequent wet etching. Therefore, one can prevent the wet etching from being contaminated. Etching of the silicon nitride film is performed by a combination of dry etching and wet etching. Therefore, compared with the case where etching is performed only by dry etching, plasma damage to the region exposed in the plasma atmosphere except for the silicon nitride film can be decreased.
    Type: Application
    Filed: March 28, 2008
    Publication date: November 27, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Tatsuki Kojima, Kenji Tsujita