Abstract: A muting device includes an external sound input unit that receives an external sound and an internal sound input unit that only receives an internal sound. The external sound received by the external sound input unit has a component, which corresponds to the internal sound received by the internal sound input unit, removed therefrom. Only when the signal level of a specific kind of external sound sampled from the external sound having the internal sound component thereof removed therefrom is equal to or larger than a certain signal level, the internal sound is automatically muted. Consequently, there is provided a muting device that autonomously and accurately mutes an internal audio output responsively to a specific external sound such as a telephone ring while being unaffected by an internal sound.

Abstract: A muting device includes an external sound input unit that receives an external sound and an internal sound input unit that only receives an internal sound. The external sound received by the external sound input unit has a component, which corresponds to the internal sound received by the internal sound input unit, removed therefrom. Only when the signal level of a specific kind of external sound sampled from the external sound having the internal sound component thereof removed therefrom is equal to or larger than a certain signal level, the internal sound is automatically muted. Consequently, there is provided a muting device that autonomously and accurately mutes an internal audio output responsively to a specific external sound such as a telephone ring while being unaffected by an internal sound.

Abstract: In order to enable one monitor device to be used as the monitor device for a plurality of computers, a display controller displays a frame represented by display data entered from a second computer on a liquid crystal display in a window within a frame represented by display data entered from a first computer, and the position and size of the window are altered by the display controller on the basis of communication data for display control extracted by a communication controller and entered from the first computer or the second computer.

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a dot clock having a predetermined period, a phase which varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: Each of a plurality of multi-display interfaces respectively associated with a liquid crystal panel is provided with setting circuits for setting a horizontal write start position, a horizontal write width, a vertical write start position, a vertical write width and an enlargement rate, a circuit for storing display data, and an ID setting circuit for setting an ID number for the liquid crystal panel. The multi-display interfaces read display data on the same or different regions to display images in various modes.

Abstract: A video signal output device which outputs a video signal, including a basic signal group generating circuit for generating a sync signal and a video signal, the video signal indicating display values of pixels at display positions on a display device in intervals of the video signal, the display positions being determined in accordance with time differences between the intervals of the video signal and the sync signal; a signal generating circuit for generating a transmission signal relating to the video signal to be transmitted to the display device; a superposing circuit for superposing the transmission signal on the sync signal to generate a second sync signal; and an output circuit for outputting the second sync signal and the video signal.

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a 1/n-frequency dot clock whose period is equal to n-times the dot period of a first video signal (n≧2) and whose phase varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the 1/n-frequency dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a 1/n-frequency dot clock whose period is equal to n-times the dot period of a first video signal (n≧2) and whose phase varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the 1/n-frequency dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: An object of the present invention is to perform precise A-D conversion of analog video signal in a liquid crystal display monitor, without increasing a transmission line: to attain this object, a horizontal dividing signal synthesizing circuit of a graphics card superposes a horizontal dividing signal synchronized in phase with a clock for D-A conversion of the analog video signal on a horizontal sync signal, to obtain a second horizontal sync signal, to be outputted; a sync signal isolating circuit of the liquid crystal display monitor isolates the horizontal dividing signal and horizontal sync signal from the second horizontal sync signal; the PLL generates an A-D conversion clock synchronized with the horizontal dividing signal.

Abstract: An object of the present invention is to perform precise A-D conversion of analog video signal in a liquid crystal display monitor, without increasing a transmission line: to attain this object, a horizontal dividing signal synthesizing circuit of a graphics card superposes a horizontal dividing signal synchronized in phase with a clock for D-A conversion of the analog video signal on a horizontal sync signal, to obtain a second horizontal sync signal, to be outputted; a sync signal isolating circuit of the liquid crystal display monitor isolates the horizontal dividing signal and horizontal sync signal from the second horizontal sync signal; the PLL generates an A-D conversion clock synchronized with the horizontal dividing signal.

Abstract: An image display device is arranged to convert analog video signals into digital video signals and display the corresponding image to the digital video signals. The image display device provides a variable delaying circuit for delaying an analog video signal of each color or a clock variable delay circuit for delaying a dot clock for generating each color dot clock and supplying each color dot clock as a conversion timing signal of an analog-to-digital converting circuit of the corresponding color. This kind of delay circuit is served to adjust a phase of the analog video signal or the dot clock of each color, thereby suppressing color blur even if the analog video signal contains skews among the colors.

Abstract: A large thin display unit has a chassis structure with a first horizontally or vertically disposed enclosure, a second vertically extending enclosure mounted to the upper side of the first enclosure, and a third vertically extending enclosure mounted above the first enclosure behind the second enclosure. The second enclosure has an opening that opens toward a front of the unit and has a margin along the perimeter of the opening. The thin display section is fixed to the margin in a vertical position. Further, an air route is formed between the third enclosure and a planar portion of the second enclosure, and an air route is formed between the thin display section and the planar portion of the second enclosure. Also, a wiring space is formed between the thin display section and the planar portion of the second enclosure. Preferably, the thin display section is a large liquid-crystal display provided with a plurality of backlights.