Patents by Inventor Tatsunori Shirai

Tatsunori Shirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6753587
    Abstract: A high response speed semiconductor photo detecting device having a thin photo absorption layer which avoids an optical efficiency loss. The semiconductor photo detecting devices are formed on a semiconductor substrate having an inclined cleavage face to a principal plane of the substrate. An incoming photo signal is input to the cleavage face perpendicularly.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: June 22, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Akira Furuya, Tatsunori Shirai
  • Publication number: 20020084505
    Abstract: A high response speed semiconductor photo detecting device having a thin photo absorption layer which avoids an optical efficiency loss. The semiconductor photo detecting devices are formed on a semiconductor substrate having an inclined cleavage face to a principle plane of the substrate. An incoming photo signal is input to the cleavage face perpendicularly.
    Type: Application
    Filed: December 27, 2001
    Publication date: July 4, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventors: Akira Furuya, Tatsunori Shirai
  • Patent number: 5179431
    Abstract: An avalanche photodiode comprises a substrate, a first semiconductor layer provided on the substrate and made of a first group III-V compound semiconductor material doped to a first conductivity type for producing carriers in response to optical radiation incident to the avalanche photodiode, a second semiconductor layer provided on the first semiconductor layer and comprising a second group III-V compound semiconductor material doped to the first conductivity for causing an avalanche multiplication of the carriers, a photoreception region formed within the second semiconductor layer and doped to a second conductivity type for forming a p-n junction at an interface to the second semiconductor layer, and a guard ring formed along a lateral boundary of the photoreception region.
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: January 12, 1993
    Assignee: Fujitsu Limited
    Inventor: Tatsunori Shirai
  • Patent number: 4481523
    Abstract: An avalanche photodiode sensitive to a wavelength range of from 1.2 to 1.65 micrometers is provided with a light absorbing layer, a middle layer and an active layer grown in order, on a substrate. All the layers contain impurities with the same conductivity but the impurity concentration is higher in the middle layer than in either of the light absorbing layer and the active layer. A p-n junction having a flat bottom and either a gradually inclined side or a step-shaped side is produced in the active layer, so that the breakdown voltage is made much less in the area facing the flat bottom of the p-n junction than in the area facing a side which has the aforementioned irregular shape. As a result, the side acts as a guard ring without being accompanied by a large amount of tunnel current flowing through the light absorbing layer in response to the intensity of the electric field.
    Type: Grant
    Filed: November 30, 1981
    Date of Patent: November 6, 1984
    Assignee: Fujitsu Limited
    Inventors: Fukunobu Osaka, Tatsunori Shirai
  • Patent number: 4415370
    Abstract: A semiconductor device, and a method for manufacturing it in which ions of beryllium are implanted into a germanium substrate to form a layer containing p-type impurity material. There after the substrate is heated at a temperature in the range of 400.degree. C. to 700.degree. C. to diffuse the beryllium ions into the substrate so that the concentration of beryllium at the surface of the impurity layer is in the order of 10.sup.17 cm.sup.-3 or more. In one embodiment, a p-type channel stopper is formed locally in a p-type germanium substrate and an n-type active layer is formed in a region surrounded by, and isolated from, the channel stopper region. In another embodiment, a relatively shallow p-type active layer is formed at one part of an n-type germanium substrate and p-type guard ring regions are formed surrounding, and partly overlapping said p-type active layer.
    Type: Grant
    Filed: September 15, 1980
    Date of Patent: November 15, 1983
    Assignee: Fujitsu Limited
    Inventors: Shuzo Kagawa, Tatsunori Shirai, Takao Kaneda, Yasuo Baba