Patents by Inventor Tatsuo Mifune

Tatsuo Mifune has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8362680
    Abstract: In a plasma display panel, in which an area percentage of the display electrodes in an area of an image display region of the front panel is expressed by a longitudinal axis, and a difference between a coefficient of expansion of the front substrate from room temperature to 300° C. and a coefficient of expansion of the dielectric layer from room temperature to 300° C. is expressed by a lateral axis, the difference between the coefficients of expansion and the area percentage stay within a region formed by connecting coordinates (35×10?7/° C., 60%), coordinates (8×10?7/° C., 60%), coordinates (5×10?7/° C., 40%), and coordinates (23×10?7/° C., 40%) in the mentioned order with a straight line where the straight line is included.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: January 29, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuhiro Morioka, Morio Fujitani, Hirofumi Higashi, Shinsuke Yoshida, Akira Kawase, Tatsuo Mifune
  • Patent number: 8350474
    Abstract: A plasma display panel includes a front plate and a rear plate disposed in such a manner as to face the front plate. The front plate has a display electrode and a dielectric layer covering the display electrode. The dielectric layer contains substantially no lead components but contains MgO, SiO2, and K2O. A content of MgO is in a range between 0.3 mol % and 1.0 mol %, both inclusive. The content of SiO2 is in a range between 35 mol % and 50 mol %, both inclusive.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: January 8, 2013
    Assignee: Panasonic Corporation
    Inventors: Yoshiyuki Ota, Kazuhiro Morioka, Akira Kawase, Morio Fujitani, Tatsuo Mifune
  • Patent number: 8179043
    Abstract: A plasma display panel is formed of a front panel including display electrodes, a dielectric layer, and a protective layer which are formed on a glass substrate, and a rear panel including electrodes, barrier ribs, and phosphor layers all of which are formed on a substrate. The front panel and the rear panel confront each other, and peripheries thereof are sealed to form a discharge space therebetween. The dielectric layer of the front panel contains Bi2O3 and at least CuO and CoO, and the total content expressed in mole % of CuO and CoO falls within a range from 0.03% to 0.3%.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: May 15, 2012
    Assignee: Panasonic Corporation
    Inventors: Akira Kawase, Kazuhiro Morioka, Yui Saitou, Shinsuke Yoshida, Tatsuo Mifune
  • Patent number: 8072142
    Abstract: A plasma display panel (PDP) with excellent display quality, including a dielectric layer that does not contain lead, satisfies transmittance, insulation resistance and dielectric constant, and suppresses coloring. The PDP includes front panel and a rear panel disposed facing each other and sealed together at the peripheries thereof with discharge space provided therebetween. The front panel includes display electrodes, a dielectric layer and a protective layer on a front glass substrate. The rear panel includes electrodes, barrier ribs and phosphor layers on a substrate. In the PDP, the display electrode includes metal bus electrodes containing silver. The dielectric layer includes a first dielectric layer covering metal bus electrodes and containing bismuth oxide, and a second dielectric layer covering the first dielectric layer and containing bismuth oxide. The thickness ratio of the second dielectric layer to the first dielectric layer is 1.3 or more and 7.2 or less.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: December 6, 2011
    Assignee: Panasonic Corporation
    Inventors: Akira Kawase, Kazuhiro Morioka, Tatsuo Mifune
  • Publication number: 20110285281
    Abstract: A plasma display panel includes a front plate and a rear plate disposed in such a manner as to face the front plate. The front plate has a display electrode and a dielectric layer covering the display electrode. The dielectric layer contains substantially no lead components but contains MgO, SiO2, and K2O. A content of MgO is in a range between 0.3 mol % and 1.0 mol %, both inclusive. The content of SiO2 is in a range between 35 mol % and 50 mol %, both inclusive.
    Type: Application
    Filed: December 17, 2010
    Publication date: November 24, 2011
    Inventors: Yoshiyuki Ota, Kazuhiro Morioka, Akira Kawase, Morio Fujitani, Tatsuo Mifune
  • Patent number: 8013531
    Abstract: A plasma display panel is formed of front panel including at least display electrodes, dielectric layer that are formed on glass substrate, and a rear panel including electrodes, barrier ribs, and phosphor layers that are formed on a substrate. Dielectric layer is formed of multiple layers, i.e. lower dielectric layer and upper dielectric layer, and these layers are made of identical material to each other, and the material contains CaO and BaO, and the content of CaO is greater than that of BaO.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: September 6, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuhiro Morioka, Yui Saitou, Akira Kawase, Shinsuke Yoshida, Tatsuo Mifune
  • Patent number: 7990065
    Abstract: The PDP has a front panel, and has a back panel with address electrodes formed thereon. Front panel has display electrodes including first electrodes and second electrodes formed on a front glass substrate, and a dielectric layer covering display electrodes. Further, the first electrodes and the dielectric layer include glass frit, which contains at least one of molybdenum oxide, magnesium oxide and cerium oxide, and also include a softening point exceeding 550° C. The above-described makeup suppresses a coloring phenomenon in the dielectric layer and the front glass substrate, thereby implementing a plasma display panel with a high luminance.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: August 2, 2011
    Assignee: Panasonic Corporation
    Inventors: Eiichi Uriu, Hatsumi Komaki, Shingo Takagi, Akira Kawase, Tatsuo Mifune
  • Publication number: 20110181174
    Abstract: A Plasma Display Panel includes a front panel and a rear panel. The front panel includes a display electrode and a dielectric layer on a glass substrate. The rear panel includes a barrier rib and a phosphor layer on a substrate. The front panel and the rear panel are arranged to face each other, and the peripheries thereof are sealed to form a discharge space therebetween. The display electrode is constituted of multiple layers including at least a metal electrode layer containing silver and a glass material. A content of bismuth oxide (Bi2O3) in the dielectric layer is in a range from 5% to 25% inclusive by weight, and a content of bismuth oxide (Bi2O3) in the glass material of the metal electrode layer is in range from 5% to 25% inclusive by weight.
    Type: Application
    Filed: March 25, 2008
    Publication date: July 28, 2011
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryoji Hyuga, Hatsumi Komaki, Shingo Takagi, Tatsuo Mifune
  • Publication number: 20110169401
    Abstract: The PDP has front plate and a rear plate. Front plate and the rear plate are oppositely disposed and sealed at the peripheries. Front plate has display electrode and dielectric layer. Dielectric layer contains an oxide of a divalent element, an oxide of a trivalent element, and an oxide of a tetravalent element. The total content of the oxide of a trivalent element and the oxide of a tetravalent element is larger by weight than the content of the oxide of a divalent element.
    Type: Application
    Filed: June 23, 2010
    Publication date: July 14, 2011
    Inventors: Shinsuke Yoshida, Akira Kawase, Kazuhiro Morioka, Naoto Haze, Yoshiyuki Ota, Morio Fujitani, Hiroshi Ito, Tatsuo Mifune
  • Patent number: 7965041
    Abstract: A plasma display panel is formed of a front panel including display electrodes, a dielectric layer, and a protective layer that are formed on a glass substrate, and a rear panel including electrodes, barrier ribs, and phosphor layers that are formed on a substrate. The front panel and the rear panel are faced with each other, and peripheries thereof are sealed to form a discharge space therebetween. The dielectric layer of the front panel contains Bi2O3 and at least CaO and BaO, and the content expressed in mole % of CaO is greater than that of BaO.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: June 21, 2011
    Assignee: Panasonic Corporation
    Inventors: Akira Kawase, Kazuhiro Morioka, Yui Saitou, Shinsuke Yoshida, Tatsuo Mifune
  • Patent number: 7956541
    Abstract: A plasma display panel is formed of a front panel including display electrodes, a dielectric layer, and a protective layer that are formed on a glass substrate, and a rear panel including electrodes, barrier ribs, and phosphor layers that are formed on a substrate. The front panel and the rear panel are faced with each other, and peripheries thereof are sealed to form a discharge space therebetween. The dielectric layer of the front panel contains Bi2O3 and at least two kinds of R2O, where R is selected from the group consisting of Li, Na, and K.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuhiro Morioka, Akira Kawase, Yui Saitou, Shinsuke Yoshida, Tatsuo Mifune
  • Patent number: 7944147
    Abstract: A plasma display panel (PDP) is made of front panel (2) and a rear panel. The front panel includes display electrodes (6), dielectric layer (8), and protective layer (8) that are formed on glass substrate (3). The rear panel includes electrodes, barrier ribs, and phosphor layers that are formed on a substrate. The front panel and the rear panel are faced with each other, and the peripheries thereof are sealed to form a discharge space therebetween. Each of display electrodes (6) contains at least silver. Dielectric layer (8) is made of first dielectric layer (81) that contains bismuth oxide and calcium oxide and covers display electrodes (6), and second dielectric layer (82) that contains bismuth oxide and barium oxide and covers first dielectric layer (81).
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: May 17, 2011
    Assignee: Panasonic Corporation
    Inventors: Akira Kawase, Kazuhiro Morioka, Kazuhiro Yokota, Yui Saitou, Tatsuo Mifune
  • Patent number: 7932675
    Abstract: There is provided a plasma display panel including: a front plate having display electrodes, a dielectric layer, and a protective layer formed on a glass substrate; and a rear plate that has electrodes, barrier ribs, and a phosphor layer formed on a substrate and is disposed opposite to the front plate. Peripheries of the front plate and the rear plate are sealed to form a discharge space, the display electrodes contains at least silver, the dielectric layer is configured to include a first dielectric layer that covers the display electrodes and second dielectric layer that covers the first dielectric layer and contains bismuth oxide, the thickness of the first dielectric layer is equal to or larger than 5 ?m and equal to or smaller than 13 ?m, and the ratio of the thickness of the first dielectric layer to the thickness of the display electrodes is larger than 1 and equal to or smaller than 3.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: April 26, 2011
    Assignee: Panasonic Corporation
    Inventors: Akira Kawase, Kazuhiro Morioka, Eiichi Uriu, Tatsuo Mifune
  • Publication number: 20110062854
    Abstract: In a plasma display panel, in which an area percentage of the display electrodes in an area of an image display region of the front panel is expressed by a longitudinal axis, and a difference between a coefficient of expansion of the front substrate from room temperature to 300° C. and a coefficient of expansion of the dielectric layer from room temperature to 300° C. is expressed by a lateral axis, the difference between the coefficients of expansion and the area percentage stay within a region formed by connecting coordinates (35×10?7/° C., 60%), coordinates (8×10?7/° C., 60%), coordinates (5×10?7/° C., 40%), and coordinates (23×10?7/° C., 40%) in the mentioned order with a straight line where the straight line is included.
    Type: Application
    Filed: March 11, 2010
    Publication date: March 17, 2011
    Inventors: Kazuhiro Morioka, Morio Fujitani, Hirofumi Higashi, Shinsuke Yoshida, Akira Kawase, Tatsuo Mifune
  • Patent number: 7902757
    Abstract: A plasma display panel (PDP) is made of front panel (2) and a rear panel. The front panel includes display electrodes (6), dielectric layer (8), and protective layer (9) that are formed on front glass substrate (3). The rear panel includes electrodes, barrier ribs, and phosphor layers that are formed on a substrate. The front panel and the rear panel are faced with each other, and the peripheries thereof are sealed to form a discharge space therebetween. Each of display electrodes (6) contains at least silver. Dielectric layer (8) is made of first dielectric layer (81) that contains bismuth oxide covering display electrodes (6), and second dielectric layer (82) that contains bismuth oxide covering first dielectric layer (81). The content of bismuth oxide in second dielectric layer (82) is smaller than the content of bismuth oxide in first dielectric layer (81).
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: March 8, 2011
    Assignee: Panasonic Corporation
    Inventors: Akira Kawase, Kazuhiro Morioka, Kazuhiro Yokota, Yui Saitou, Tatsuo Mifune
  • Patent number: 7878875
    Abstract: The PDP has a front panel, and a back panel with address electrodes formed thereon. The front panel has display electrodes including first electrodes and second electrodes formed on front glass substrate, and a dielectric layer covering the display electrodes. Further, first electrodes and the dielectric layer include glass frit containing bismuth oxide, with a softening point exceeding 550° C. The glass frit contained in the second electrodes has a softening point lower than that contained in the first electrodes. The above-described configuration reduces the number of firing steps for display electrodes and the dielectric layer, thereby providing a PDP with improved production efficiency and a method of manufacturing the PDP.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: February 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Eiichi Uriu, Akira Kawase, Kazuhiro Morioka, Tatsuo Mifune
  • Publication number: 20100248579
    Abstract: A method of manufacturing a PDP in accordance with the present invention is a method of manufacturing a PDP including a front panel having a display electrode, a light blocking layer and a dielectric layer formed on a glass substrate, and a rear panel having an electrode, a barrier rib, and a phosphor layer formed on a substrate, the front panel and the rear panel being disposed facing each other and sealed together at peripheries thereof with discharge space provided therebetween. The method includes forming the display electrode by at least a plurality of layers including metal electrode layer containing silver and a glass material, and a black layer containing a black material and a glass material; adding bismuth oxide to the dielectric layer in the content of 5% by weight or more and 25% by weight or less; and forming the dielectric layer by firing at a temperature ranging from 570° C. to 590° C.
    Type: Application
    Filed: March 25, 2008
    Publication date: September 30, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Hatsumi Komaki, Shingo Takagi, Ryoji Hyuga, Tatsuo Mifune
  • Publication number: 20100244659
    Abstract: A Plasma Display Panel includes a front panel having a display electrode and a dielectric layer formed on a glass substrate; and a rear panel having an electrode, a barrier rib, and a phosphor layer formed on a substrate. The front panel and the rear panel are disposed facing each other and sealed together at peripheries thereof with discharge space provided therebetween. The display electrode has at least a metal bus electrode including a metal electrode layer containing silver and a glass material, and a black layer containing a black material and a glass material. The glass material of the metal electrode layer and the black layer includes bismuth oxide. An undercut amount of the metal bus electrode is 25 ?m or more.
    Type: Application
    Filed: March 25, 2008
    Publication date: September 30, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Shingo Takagi, Hatsumi Komaki, Ryoji Hyuga, Tatsuo Mifune
  • Publication number: 20100219743
    Abstract: PDP with excellent display quality, including a dielectric layer that does not contain lead, satisfies transmittance, insulation resistance and dielectric constant, and suppresses coloring. PDP includes front panel and a rear panel disposed facing each other and sealed together at the peripheries thereof with discharge space provided therebetween. Front panel-includes display electrodes, dielectric layer and protective layer on front glass substrate. The rear panel includes electrodes, barrier ribs and phosphor layers on a substrate. In PDP, display electrode includes metal bus electrodes containing silver. Dielectric layer includes first dielectric layer covering metal bus electrodes and containing bismuth oxide, and second dielectric layer covering first dielectric layer and containing bismuth oxide. The thickness ratio of second dielectric layer to first dielectric layer is 1.3 or more and 7.2 or less.
    Type: Application
    Filed: February 8, 2007
    Publication date: September 2, 2010
    Inventors: Akira Kawase, Kazuhiro Morioka, Tatsuo Mifune
  • Publication number: 20100182309
    Abstract: A plasma display panel is formed of a front panel including display electrodes, a dielectric layer, and a protective layer which are formed on a glass substrate, and a rear panel including electrodes, barrier ribs, and phosphor layers all of which are formed on a substrate. The front panel and the rear panel confront each other, and peripheries thereof are sealed to form a discharge space therebetween. The dielectric layer of the front panel contains Bi2O3 and at least CuO and CoO, and the total content expressed in mole % of CuO and CoO falls within a range from 0.03% to 0.3%.
    Type: Application
    Filed: August 4, 2008
    Publication date: July 22, 2010
    Inventors: Akira Kawase, Kazuhiro Morioka, Yui Saitou, Shinsuke Yoshida, Tatsuo Mifune