Patents by Inventor Tatsuo Naijo

Tatsuo Naijo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150255586
    Abstract: According to one embodiment, a semiconductor device includes an optional first electrode, a second electrode, a first and a third semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third electrode, and a second insulating film. The first semiconductor region extends between the first electrode and the second electrode. The second semiconductor region extends between the first semiconductor region and the second electrode. The third semiconductor region extends between the second semiconductor region and the second electrode. The third semiconductor region has a dopant concentration higher than a dopant concentration of the first semiconductor region. The third electrode is in contact, via a first insulating film, with the first semiconductor region, the second semiconductor region, and the third semiconductor region. The third semiconductor region is disposed between the second insulating film and the third electrode.
    Type: Application
    Filed: August 29, 2014
    Publication date: September 10, 2015
    Inventor: Tatsuo NAIJO
  • Publication number: 20140077255
    Abstract: A semiconductor device has semiconducting layers forming a collector layer, a buffer layer, a drift layer, a base layer, and an emitter layer. The drift layer has alternating regions of n-type and p-type semiconductor material arrayed along a first direction. The drift layer further comprises two stacked layers, each stacked layer with alternating regions of n-type and p-type semiconductor material. Each stacked drift layer portion has a different concentration of n-type and p-type dopants. The stacked drift layer portions also have different thicknesses, such that the interface between the stacked drift layer portions is closer to the buffer layer than base layer. In addition, the regions of n-type and p-type semiconductor material of the drift layer may have the same width in the first direction.
    Type: Application
    Filed: March 6, 2013
    Publication date: March 20, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tatsuo NAIJO
  • Patent number: 8169034
    Abstract: A semiconductor device includes: a drift layer of a first conductivity type; a base layer of a second conductivity type provided on the drift layer; an emitter layer of the first conductivity type provided in part of an upper portion of the base layer; a buffer layer of the first conductivity type provided below the drift layer; a high-resistance layer of the first conductivity type provided below the buffer layer; a collector layer of the second conductivity type provided in a partial region on a lower surface of the high-resistance layer; a contact layer of the first conductivity type provided in another partial region on the lower surface of the high-resistance layer; a trench gate electrode extending through the emitter layer and the base layer into the drift layer; and a gate insulating film provided between the emitter layer, the base layer, and the drift layer on one hand and the trench gate electrode on the other.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: May 1, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tatsuo Naijo
  • Publication number: 20100230716
    Abstract: A semiconductor device includes: a drift layer of a first conductivity type; a base layer of a second conductivity type provided on the drift layer; an emitter layer of the first conductivity type provided in part of an upper portion of the base layer; a buffer layer of the first conductivity type provided below the drift layer; a high-resistance layer of the first conductivity type provided below the buffer layer; a collector layer of the second conductivity type provided in a partial region on a lower surface of the high-resistance layer; a contact layer of the first conductivity type provided in another partial region on the lower surface of the high-resistance layer; a trench gate electrode extending through the emitter layer and the base layer into the drift layer; and a gate insulating film provided between the emitter layer, the base layer, and the drift layer on one hand and the trench gate electrode on the other.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 16, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tatsuo NAIJO
  • Patent number: 7772641
    Abstract: A power semiconductor device includes: a semiconductor layer having a trench extending along a first direction in a stripe configuration; a gate electrode buried in the trench for controlling a current flowing in the semiconductor layer; and a gate plug made of a material having higher electrical conductivity than the gate electrode, the gate plug having the stripe configuration and being connected to the gate electrode along the first direction. The semiconductor layer includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided partially in an upper face of the first semiconductor layer; a third semiconductor layer of the first conductivity type provided partially on the second semiconductor layer; and a fourth semiconductor layer of the second conductivity type provided on a lower face of the first semiconductor layer.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: August 10, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ichiro Omura, Yoko Sakiyama, Hideki Nozaki, Atsushi Murakoshi, Masanobu Tsuchitani, Koichi Sugiyama, Tsuneo Ogura, Masakazu Yamaguchi, Tatsuo Naijo
  • Publication number: 20070210350
    Abstract: A power semiconductor device includes: a semiconductor layer having a trench extending along a first direction in a stripe configuration; a gate electrode buried in the trench for controlling a current flowing in the semiconductor layer; and a gate plug made of a material having higher electrical conductivity than the gate electrode, the gate plug having the stripe configuration and being connected to the gate electrode along the first direction. The semiconductor layer includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided partially in an upper face of the first semiconductor layer; a third semiconductor layer of the first conductivity type provided partially on the second semiconductor layer; and a fourth semiconductor layer of the second conductivity type provided on a lower face of the first semiconductor layer.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 13, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ichiro Omura, Yoko Sakiyama, Hideki Nozaki, Atsushi Murakoshi, Masanobu Tsuchitani, Koichi Sugiyama, Tsuneo Ogura, Masakazu Yamaguchi, Tatsuo Naijo