Patents by Inventor Tatsuro Akiyama

Tatsuro Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6965338
    Abstract: A cascade A/D converter that has shorter settling time and enables high-speed operation is provided. A cascade A/D converter comprises fundamental constituent elements cascaded in plural stages, each fundamental constituent element comprising a first comparator for inputting an analog input signal, a D/A converter for converting an output of the first comparator to an analog signal again, and a subtractor for subtracting an output of the D/A converter from the analog input signal, the fundamental constituent elements comprising: a second comparator for inputting the analog input signal every least significant bit near a transition point of the first comparator; and an arithmetic operating unit for generating upper bits based on an output of the first comparator and interpolating lower bits based on an output of the second comparator.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: November 15, 2005
    Assignee: Yokogawa Electric Corporation
    Inventors: Koichi Irie, Tomohiro Kawachi, Tatsuro Akiyama
  • Publication number: 20050162300
    Abstract: A cascade A/D converter that has shorter settling time and enables high-speed operation is provided. A cascade A/D converter comprises fundamental constituent elements cascaded in plural stages, each fundamental constituent element comprising a first comparator for inputting an analog input signal, a D/A converter for converting an output of the first comparator to an analog signal again, and a subtractor for subtracting an output of the D/A converter from the analog input signal, the fundamental constituent elements comprising: a second comparator for inputting the analog input signal every least significant bit near a transition point of the first comparator; and an arithmetic operating unit for generating upper bits based on an output of the first comparator and interpolating lower bits based on an output of the second comparator.
    Type: Application
    Filed: November 19, 2004
    Publication date: July 28, 2005
    Applicant: YOKOGAWA ELECTRIC CORPORATION
    Inventors: Koichi Irie, Tomohiro Kawachi, Tatsuro Akiyama