Patents by Inventor Tatsuro Hashiguchi

Tatsuro Hashiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5261084
    Abstract: In a method of judging a data memory access error in an information processing apparatus, the data memory access error flag is set in the process state register upon occurrence thereof, and an error flag in the process state register is set until updating of the process state register and until clearing by a software instruction. The data memory access errors are stored in the general registers in units of operation levels, and data memory access error judging is executed upon detection of the error flag under the control of software.
    Type: Grant
    Filed: July 10, 1992
    Date of Patent: November 9, 1993
    Assignee: NEC Corporation
    Inventors: Tatsuro Hashiguchi, Atsushi Takahashi
  • Patent number: 4920479
    Abstract: In a multiprocessor system having a first and a second storage control units with a first and a second buffer storages of a store-in type, respectively, for connecting a plurality of execution processor units to main storage units, a first diagnostic processor controls a reading circuit to read out first buffer data from the first buffer storage, upon occurrence of an error caused in the first storage control unit having the first buffer storage currently connected to a first of main storage units. The read-out first buffer data are transferred to a second diagnostic processor which, in turn, makes a writing circuit to write the read-out first buffer data into the second buffer storage to enable any one of the execution processor units to use the first buffer data after occurrence of the error.
    Type: Grant
    Filed: February 26, 1988
    Date of Patent: April 24, 1990
    Assignee: NEC Corporation
    Inventor: Tatsuro Hashiguchi