Patents by Inventor Tatsuro Hitomi

Tatsuro Hitomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11422712
    Abstract: According to one embodiment, a storage device includes a stage on which a semiconductor wafer can be mounted, wherein data is capable of being read from the semiconductor wafer or data is capable of being written to the semiconductor wafer. The storage device further includes a plurality of probe pins for reading or writing data, and a controller connected the probe pins. The semiconductor wafer includes electrodes connectable to the probe pins, a first memory area that can store user data, and a second memory area that can store identification information for identification of the semiconductor wafer and a check code for checking integrity of the identification information. The controller is capable of reading the identification information and the check code from the second memory area.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 23, 2022
    Assignee: Kioxia Corporation
    Inventors: Yasuhito Yoshimizu, Takashi Fukushima, Tatsuro Hitomi, Arata Inoue, Masayuki Miura, Shinichi Kanno, Toshio Fujisawa, Keisuke Nakatsuka, Tomoya Sanuki
  • Publication number: 20220223552
    Abstract: A memory chip unit includes a pad electrode including first and second portions, and a memory cell array. A prober includes a probe card and a movement mechanism. The probe card includes a probe electrode to be in contact with the pad electrode, and a memory controller electrically coupled to the probe electrode and executes reading and writing on the memory cell array. The movement mechanism executes a first operation that brings the probe electrode into contact with the first portion and does not bring the probe electrode into contact with the second portion, and a second operation that does not bring the probe electrode into contact with the first portion and brings the probe electrode into contact with the second portion.
    Type: Application
    Filed: March 15, 2022
    Publication date: July 14, 2022
    Inventors: Yasuhito YOSHIMIZU, Takashi FUKUSHIMA, Tatsuro HITOMI, Arata INOUE, Masayuki MIURA, Shinichi KANNO, Toshio FUJISAWA, Keisuke NAKATSUKA, Tomoya SANUKI
  • Publication number: 20220204270
    Abstract: According to one embodiment, a storage device includes a control apparatus and a stocker. The control apparatus writes data to or reads data from a storage medium that includes a plurality of non-volatile memory chips. The stocker stores a plurality of the storage media that are detached from the control apparatus. The control apparatus includes a first temperature control system. The first temperature control system raises temperature of the storage medium to a first temperature or higher. The stocker includes a second temperature control system. The second temperature control system cools the storage medium to a second temperature or lower. The second temperature is lower than the first temperature.
    Type: Application
    Filed: March 14, 2022
    Publication date: June 30, 2022
    Inventors: Yasuhito YOSHIMIZU, Takashi FUKUSHIMA, Tatsuro HITOMI, Arata INOUE, Masayuki MIURA, Shinichi KANNO, Toshio FUJISAWA, Keisuke NAKATSUKA, Tomoya SANUKI
  • Publication number: 20210165713
    Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 3, 2021
    Applicant: Toshiba Memory Corporation
    Inventors: Tsukasa TOKUTOMI, Masanobu SHIRAKAWA, Marie TAKADA, Masamichi FUJIWARA, Kazumasa YAMAMOTO, Naoaki KOKUBUN, Tatsuro HITOMI, Hironori UCHIKAWA
  • Publication number: 20210149568
    Abstract: According to one embodiment, a storage device includes a stage on which a semiconductor wafer can be mounted, wherein data is capable of being read from the semiconductor wafer or data is capable of being written to the semiconductor wafer. The storage device further includes a plurality of probe pins for reading or writing data, and a controller connected the probe pins. The semiconductor wafer includes electrodes connectable to the probe pins, a first memory area that can store user data, and a second memory area that can store identification information for identification of the semiconductor wafer and a check code for checking integrity of the identification information. The controller is capable of reading the identification information and the check code from the second memory area.
    Type: Application
    Filed: December 14, 2020
    Publication date: May 20, 2021
    Applicant: Kioxia Corporation
    Inventors: Yasuhito YOSHIMIZU, Takashi FUKUSHIMA, Tatsuro HITOMI, Arata INOUE, Masayuki MIURA, Shinichi KANNO, Toshio FUJISAWA, Keisuke NAKATSUKA, Tomoya SANUKI
  • Patent number: 10956264
    Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: March 23, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Tsukasa Tokutomi, Masanobu Shirakawa, Marie Takada, Masamichi Fujiwara, Kazumasa Yamamoto, Naoaki Kokubun, Tatsuro Hitomi, Hironori Uchikawa
  • Publication number: 20190377636
    Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.
    Type: Application
    Filed: August 21, 2019
    Publication date: December 12, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Tsukasa TOKUTOMI, Masanobu SHIRAKAWA, Marie TAKADA, Masamichi FUJIWARA, Kazumasa YAMAMOTO, Naoaki KOKUBUN, Tatsuro HITOMI, Hironori UCHIKAWA
  • Patent number: 10430275
    Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 1, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Tsukasa Tokutomi, Masanobu Shirakawa, Marie Takada, Masamichi Fujiwara, Kazumasa Yamamoto, Naoaki Kokubun, Tatsuro Hitomi, Hironori Uchikawa
  • Publication number: 20190087264
    Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.
    Type: Application
    Filed: March 9, 2018
    Publication date: March 21, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Tsukasa Tokutomi, Masanobu Shirakawa, Marie Takada, Masamichi Fujiwara, Kazumasa Yamamoto, Naoaki Kokubun, Tatsuro Hitomi, Hironori Uchikawa