Patents by Inventor Tatsuro Sakai

Tatsuro Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240017684
    Abstract: According to an embodiment of the present disclosure, there are provided a clamp and a wire harness which are capable of enhancing versatility. This clamp (30) is applied to two electric wires (20), which respectively have core wires (21) all having fiat cross-sectional shapes and are parallel to each other, is configured to be fixable to a panel P, and holds the two electric wires (20). The clamp (30) comprises: a fixed member (40) fixed to the panel P; and two holding members (50) which are detachably attached to the fixed member (40) and respectively hold the two electric wires (20).
    Type: Application
    Filed: July 29, 2021
    Publication date: January 18, 2024
    Inventor: Tatsuro SAKAI
  • Publication number: 20230406238
    Abstract: The purpose of the present invention is to provide a wire harness that can easily bend along a routing path. A wire harness (10) comprises: two electric wires (20) each having a core wire (21) and an insulating coating part (22) that coats the outer periphery of the core wire (21); and a joining part (23) that joins the coating parts (22) with each other in a condition in which the two electric wires (20) are parallel. The joining part (23) joins with each other the portions of the coating parts (22) of the two electric wires (20) that cover end parts in the width direction of the core wires (21), and is configured so as to be capable of bending deformation between a first attitude in which the core wires (21) of the two electric wires are parallel in the mutual width direction thereof, and a second attitude in which the core wires (21) of the two electric wires (20) are parallel in the mutual thickness direction thereof.
    Type: Application
    Filed: July 30, 2021
    Publication date: December 21, 2023
    Inventor: Tatsuro SAKAI
  • Patent number: 7726153
    Abstract: An object of the present invention is to provide a method for manufacturing a glass particle deposited body in which a taper portion formed at an end portion of the glass particle deposited body is reduced without increasing the number of burners.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: June 1, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Toshihiro Ooishi, Motonori Nakamura, Tomohiro Ishihara, Tatsuro Sakai
  • Patent number: 7205722
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: April 17, 2007
    Assignee: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Patent number: 7202604
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: April 10, 2007
    Assignee: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20070040506
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for covering the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Application
    Filed: October 25, 2006
    Publication date: February 22, 2007
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Patent number: 7148625
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: December 12, 2006
    Assignee: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20060097637
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Application
    Filed: December 14, 2005
    Publication date: May 11, 2006
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20060097639
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Application
    Filed: December 14, 2005
    Publication date: May 11, 2006
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20060086147
    Abstract: An object of the present invention is to provide a method for manufacturing a glass particle deposited body in which a taper portion formed at an end portion of the glass particle deposited body is reduced without increasing the number of burners.
    Type: Application
    Filed: April 18, 2003
    Publication date: April 27, 2006
    Inventors: Toshihiro Ooishi, Motonori Nakamura, Tomohiro Ishihara, Tatsuro Sakai
  • Publication number: 20060081004
    Abstract: A method of producing a glass blank with a high rate and high efficiency of deposition on a starting member is provided. A raw material powder including silica-glass-containing particles is transferred with a carrier gas and supplied into a flame, and the raw material powder and the flame are sprayed on a starting member to deposit the raw material powder on the starting member and form a porous body. The porous body is consolidated by heating.
    Type: Application
    Filed: March 15, 2004
    Publication date: April 20, 2006
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shinji Ishikawa, Tetsutaro Katayama, Motonori Nakamura, Tatsuro Sakai, Takashi Kogo
  • Publication number: 20040182114
    Abstract: A method of producing a porous glass-particle-deposited body by effectively depositing the glass particles synthesized by a burner for synthesizing glass particles on a starting member with increased bonding strength between the deposited glass particles and decreased possibility of developing cracks and other problems, and a burner to be used for the production method. In the method of producing the deposited body by depositing the glass particles synthesized by a burner on the surface of the starting member, the glass particle deposition surface has (a) a region that is hit by the center portion of the flame issuing from the burner and (b) another region that has a temperature higher than that of the region hit by the center portion of the flame and that is located at the outside of the region hit by the center portion of the flame.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 23, 2004
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Toshihiro Ooishi, Motonori Nakamura, Tatsuro Sakai
  • Publication number: 20040172977
    Abstract: A method of producing a glass particle-deposited body having a reduced amount of longitudinal diameter fluctuations with few imperfect points. The method comprises the steps of (a) synthesizing glass particles with at least one burner and (b) moving the at least one burner, a starting material, or both so that the glass particles can adhere onto the surface of the starting material to be deposited there. Two types of vertical spaces in a reaction container are defined; one is the space in which the at least one burner, the starting material's surface onto which the glass particles are to adhere, or both move, and the other is the space enclosed by (a) the position of the at least one burner, (b) the position at which the extended center axis of the at least one burner intersects the opposite wall of the reaction container, and (c) the position of the at least one gas-discharging port.
    Type: Application
    Filed: March 2, 2004
    Publication date: September 9, 2004
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Motonori Nakamura, Toshihiro Ooishi, Tatsuro Sakai, Yuichi Ohga
  • Patent number: 6657386
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: December 2, 2003
    Assignee: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Patent number: 6586880
    Abstract: Each of partition walls of a plasma display panel has a pair of transverse walls which are disposed in parallel with each other having a space equal to a width of a discharge cell in the column direction, and vertical walls which are disposed between the pair of vertical walls in parallel with each other having a space equal to a width of the discharge cell in the row direction and which are integrally coupled to the pair of transverse walls. Each partition wall defines discharge cells in each line of the plasma display panel, and is formed such that a width of a portion of the transverse wall situated between the adjacent vertical walls is larger than a width of a portion of the transverse wall coupled to the vertical wall.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: July 1, 2003
    Assignee: Pioneer Corporation
    Inventors: Kimio Amemiya, Tatsuro Sakai, Hiroyuki Ajiki
  • Patent number: 6522075
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: February 18, 2003
    Assignee: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Patent number: 6465956
    Abstract: A plasma display panel includes a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: October 15, 2002
    Assignee: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20020140350
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Application
    Filed: May 24, 2002
    Publication date: October 3, 2002
    Applicant: Pioneer Corporation
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20020084956
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Application
    Filed: February 27, 2002
    Publication date: July 4, 2002
    Applicant: PIONEER CORPORATION
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda
  • Publication number: 20020084753
    Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.
    Type: Application
    Filed: February 27, 2002
    Publication date: July 4, 2002
    Applicant: PIONEER CORPORATION
    Inventors: Chiharu Koshio, Kimio Amemiya, Toshihiro Komaki, Hitoshi Taniguchi, Tatsuro Sakai, Kosuke Masuda