Abstract: A method for manufacturing a semiconductor device is provided including: a step of forming a solid barrier metal layer on an interlayer insulating film; a removing step of removing at least a part of the solid barrier metal layer located at a place at which a pad opening portion is to be formed; a step of forming a solid second Al alloy film on the interlayer insulating film exposed in the removing step described above and the solid barrier metal layer; a step of patterning the solid second Al alloy film and the solid barrier metal layer so as to form a bonding pad portion on the interlayer insulating film; a step of forming a passivation film on the bonding pad portion and the interlayer insulating film; and a step of forming the pad opening portion in the passivation film at a position located on the bonding pad portion.

Abstract: Certain embodiments relate to semiconductor devices having an improved dielectric strength and methods for manufacturing the same. A semiconductor device 1000 may have a field effect transistor 100. The field effect transistor 100 includes a gate dielectric layer 30, a source region 32 and a drain region 34. A first semi-recessed LOCOS layer 40 may be formed between the gate dielectric layer 30 and the drain region 34. A second semi-recessed LOCOS layer 50 may be formed between the gate dielectric layer 30 and the source region 32. A first offset impurity layer 42 may be formed below the first semi-recessed LOCOS layer 40. A second offset impurity layer 52 may be formed below the second semi-recessed LOCOS layer 50.

Abstract: A method for manufacturing a semiconductor device is provided including: a step of forming a solid barrier metal layer on an interlayer insulating film; a removing step of removing at least a part of the solid barrier metal layer located at a place at which a pad opening portion is to be formed; a step of forming a solid second Al alloy film on the interlayer insulating film exposed in the removing step described above and the solid barrier metal layer; a step of patterning the solid second Al alloy film and the solid barrier metal layer so as to form a bonding pad portion on the interlayer insulating film; a step of forming a passivation film on the bonding pad portion and the interlayer insulating film; and a step of forming the pad opening portion in the passivation film at a position located on the bonding pad portion.

Abstract: Certain embodiments relate to semiconductor devices having an improved dielectric strength and methods for manufacturing the same. A semiconductor device 1000 may have a field effect transistor 100. The field effect transistor 100 includes a gate dielectric layer 30, a source region 32 and a drain region 34. A semi-recessed LOCOS layer 40 may be provided between the gate dielectric layer 30 and the drain region 34. An offset impurity layer 42 may be provided below the semi-recessed LOCOS layer 40.

Abstract: Certain embodiments relate to semiconductor devices having an improved dielectric strength and methods for manufacturing the same. A semiconductor device 1000 may have a field effect transistor 100. The field effect transistor 100 includes a gate dielectric layer 30, a source region 32 and a drain region 34. A first semi-recessed LOCOS layer 40 may be formed between the gate dielectric layer 30 and the drain region 34. A second semi-recessed LOCOS layer 50 may be formed between the gate dielectric layer 30 and the source region 32. A first offset impurity layer 42 may be formed below the first semi-recessed LOCOS layer 40.

Abstract: Certain embodiments relate to semiconductor devices having an improved dielectric strength and methods for manufacturing the same. A semiconductor device 1000 may have a field effect transistor 100. The field effect transistor 100 includes a gate dielectric layer 30, a source region 32 and a drain region 34. A semi-recessed LOCOS layer 40 may be provided between the gate dielectric layer 30 and the drain region 34. An offset impurity layer 42 may be provided below the semi-recessed LOCOS layer 40.