Abstract: Methods and apparatus provide, for each partial area into which a display area is divided, determining multiple pixel groups including pixels overlapping a two-dimensional area; allocating the pixels belonging to the multiple pixel groups to any one of multiple processing groups that are each capable of including pixels whose number is smaller than or equal to a predetermined parallel number; calculating in parallel each color of pixels belonging to the processing group on the basis of the color calculation information stored in the memory; and outputting image data on the basis of the calculated color.

Abstract: In order to improve a processing speed for calculating a color of a pixel using data for calculating the color regarding each position in an area, an image processing apparatus determines, for each partial area into which a display area is divided, multiple pixel groups including pixels overlapping a two-dimensional area; allocates the pixels belonging to the multiple pixel groups to any one of multiple processing groups that are each capable of including pixels whose number is smaller than or equal to a predetermined parallel number; calculates in parallel each color of pixels belonging to the processing group on the basis of the color calculation information stored in the memory; and outputs image data on the basis of the calculated color. In the allocation, for each of the pixel groups, the pixels are allocated to at least one of the multiple processing groups such that the number of processing groups to which the pixels belonging to the pixel group are allocated is a necessary minimum number.

Abstract: A parallelization permission and prohibition management unit of a processor manages the permission or prohibition of the parallelization for each combination of partial spaces in cooperation with another parallelization permission and prohibition management unit of a different processor. Specifically, when any given object is present across the boundary between a first partial space and a second partial space, the parallelization is prohibited between the collision process to be performed by any given processor on the virtual objects in the first partial space and the collision process to be performed by another processor on the virtual object in the second partial space.

Abstract: A parallelization permission and prohibition management unit of a processor manages the permission or prohibition of the parallelization for each combination of partial spaces in cooperation with another parallelization permission and prohibition management unit of a different processor. Specifically, when any given object is present across the boundary between a first partial space and a second partial space, the parallelization is prohibited between the collision process to be performed by any given processor on the virtual objects in the first partial space and the collision process to be performed by another processor on the virtual object in the second partial space.