Patents by Inventor Tatsuya Ishizaki

Tatsuya Ishizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190078509
    Abstract: The present invention relates to a bearing device comprising: a rotating shaft (14); journal bearings (21, 22) in each of which the outer circumferential surface and the inner circumferential surface do not communicate with one another, the journal bearings being provided to the rotating shaft (14) and rotatably supporting the rotating shaft (14) at at least two sites in the axial direction; a bearing housing (16) that forms a space (16A) for housing the journal bearings (21, 22); a third supply passage (43) and a fourth supply passage (44) which are outer circumferential surface-side lubricating oil supply passages that respectively communicate, in the space (16A), with locations of the outer circumferential surface of the respective journal bearings (21, 22); and a sixth supply passage (46) which is an intermediate-section lubricating oil supply passage that communicates, in the space (16A), with a location between the journal bearings (21, 22).
    Type: Application
    Filed: March 1, 2016
    Publication date: March 14, 2019
    Applicant: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD.
    Inventors: Takaya FUTAE, Takashi NAMBU, Tatsuya ISHIZAKI, Yuya KOJIMA, Tadasuke NISHIOKA
  • Publication number: 20190063496
    Abstract: The purpose of the invention is to reduce bearing loss due to lubricating oil. This invention comprises: a rotary shaft (14); a journal bearing (22) that is provided to the rotary shaft (14) and that rotatably supports the rotary shaft (14); a flange part (17b) having an opposing surface part (17bb) that is arranged so as to oppose a side surface part (22d) of the journal bearing (22) with a gap (D) therebetween in the axial direction in which the rotary shaft (14) extends; and a recess part (22e) provided in the side surface part (22d) or the opposing surface part (17bb). In the projected area of the journal bearing (22) in the axial direction, the area of a section including the recess part (22e) and not forming the gap (D) is larger than the area in which the side surface part (22d) and the opposing surface part (17bb) form the gap (D).
    Type: Application
    Filed: March 1, 2016
    Publication date: February 28, 2019
    Applicant: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD.
    Inventors: Takaya FUTAE, Takashi NAMBU, Tatsuya ISHIZAKI, Seigi YANO
  • Publication number: 20190048933
    Abstract: The present invention improves the drainability of lubricating oil. The present invention comprises: a rotating shaft (14); a journal bearing that is provided to the rotating shaft (14) and rotationally supports the rotating shaft (14); a bearing housing part that houses the journal bearing; and a drain oil space chamber (47) that acts as an oil drainage passage that communicates with the bearing housing part, is provided along the periphery of the rotating shaft (14), and is formed to open downward.
    Type: Application
    Filed: March 1, 2016
    Publication date: February 14, 2019
    Applicant: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD.
    Inventors: Yuya KOJIMA, Tatsuya ISHIZAKI, Yosuke DAMMOTO, Yoji AKIYAMA
  • Patent number: 10093255
    Abstract: A vehicle bumper includes: a bumper beam, a bumper face, covering a vehicle body front surface of the bumper beam, and a buffer component, provided between the bumper beam and the bumper face. The buffer component includes a platelike component configured to be folded upon collision load. The buffer component includes a folded part, and two surface parts that are connected through the folded part and are opposite to each other with a gap therebetween in a front-rear direction of the vehicle. A pressure pipe configured to be deformed by being clamped between the two surface parts so as to detect impact is provided in the gap. A lower space part that avoids interference between the bumper beam and a setting part for the pressure pipe in the buffer component is provided below the bumper beam.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: October 9, 2018
    Assignee: Honda Motor Co., Ltd.
    Inventors: Teruaki Aizawa, Tatsuya Ishizaki
  • Patent number: 10060470
    Abstract: To reduce bearing loss due to an oil-shortage region on a pad facing a thrust collar, a thrust bearing according to at least one embodiment of the present invention includes a thrust collar, and at least one bearing pad disposed along a circumferential direction on a bearing surface, the at least one bearing pad having a tapered portion and a land portion. Each of the at least one bearing pad is formed so that a periphery portion on an outer side with respect to a radial direction gets closer to an inner side with respect to the radial direction toward an upstream side with respect to the rotational direction.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: August 28, 2018
    Assignee: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD.
    Inventors: Takaya Futae, Yosuke Danmoto, Mitsushige Kubota, Hiroshi Suzuki, Tatsuya Ishizaki
  • Patent number: 9855971
    Abstract: A vehicle body structure includes a frame impact absorbing part extending from the side of a left front side frame in the longitudinal direction of the vehicle body. The frame impact absorbing part includes first and second frame bending members that form a frame tubular body, upper and lower frame flanges projecting outward from the frame tubular body, upper and lower first fragile portions that divide the frame flanges in the longitudinal direction of the vehicle body, and a plurality of frame rigid portions formed at a rear end of the frame tubular body on the rear side of the vehicle body with respect to the first fragile portions.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: January 2, 2018
    Assignee: Honda Motor Co., Ltd.
    Inventors: Kazuhiro Daido, Tatsuya Ishizaki, Akira Hojo
  • Publication number: 20170276233
    Abstract: An oil-drain device for a thrust bearing includes: a rotor shaft; a collar member mounted to an outer periphery of the rotor shaft; a thrust bearing supporting the rotor shaft in an axial direction; and an oil-drain space forming member defining an oil-drain space through which lubricant oil leaking from a sliding portion of the thrust bearing flows, between the thrust bearing and the oil-drain space forming member. The oil-drain space includes: an oil-drain channel defined between a first end surface of the thrust bearing and a first end surface of the oil-drain space forming member, surrounding the flange portion of the collar member; and an oil-drain port formed below the oil-drain channel, for discharging the lubricant oil flowing through the oil-drain channel outside the oil-drain space.
    Type: Application
    Filed: December 18, 2014
    Publication date: September 28, 2017
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Tadasuke NISHIOKA, Yosuke DANMOTO, Isao TOMITA, Takashi NAMBU, Yoji AKIYAMA, Yuya KOJIMA, Tatsuya ISHIZAKI, Seigi YANO, Takaya FUTAE, Motoki EBISU
  • Publication number: 20170274850
    Abstract: A vehicle bumper includes: a bumper beam, a bumper face, covering a vehicle body front surface of the bumper beam, and a buffer component, provided between the bumper beam and the bumper face. The buffer component includes a platelike component configured to be folded upon collision load. The buffer component includes a folded part, and two surface parts that are connected through the folded part and are opposite to each other with a gap therebetween in a front-rear direction of the vehicle. A pressure pipe configured to be deformed by being clamped between the two surface parts so as to detect impact is provided in the gap. A lower space part that avoids interference between the bumper beam and a setting part for the pressure pipe in the buffer component is provided below the bumper beam.
    Type: Application
    Filed: March 14, 2017
    Publication date: September 28, 2017
    Applicant: Honda Motor Co.,Ltd.
    Inventors: Teruaki AIZAWA, Tatsuya ISHIZAKI
  • Publication number: 20170159702
    Abstract: To reduce bearing loss due to an oil-shortage region on a pad facing a thrust collar, a thrust bearing according to at least one embodiment of the present invention includes a thrust collar, and at least one bearing pad disposed along a circumferential direction on a bearing surface, the at least one bearing pad having a tapered portion and a land portion. Each of the at least one bearing pad is formed so that a periphery portion on an outer side with respect to a radial direction gets closer to an inner side with respect to the radial direction toward an upstream side with respect to the rotational direction.
    Type: Application
    Filed: October 21, 2014
    Publication date: June 8, 2017
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Takaya FUTAE, Yosuke DANMOTO, Mitsushige KUBOTA, Hiroshi SUZUKI, Tatsuya ISHIZAKI
  • Publication number: 20170106909
    Abstract: A vehicle body structure includes a frame impact absorbing part extending from the side of a left front side frame in the longitudinal direction of the vehicle body. The frame impact absorbing part includes first and second frame bending members that form a frame tubular body, upper and lower frame flanges projecting outward from the frame tubular body, upper and lower first fragile portions that divide the frame flanges in the longitudinal direction of the vehicle body, and a plurality of frame rigid portions formed at a rear end of the frame tubular body on the rear side of the vehicle body with respect to the first fragile portions.
    Type: Application
    Filed: October 10, 2016
    Publication date: April 20, 2017
    Inventors: Kazuhiro DAIDO, Tatsuya ISHIZAKI, Akira HOJO
  • Patent number: 8248866
    Abstract: A semiconductor storage device, in which successive reading and successive writing of data having a predetermined length from and to a memory cell specified by a certain address are performed, includes a plurality of memory cells, address input terminals through which the address is input, data output terminals through which read data having the predetermined length is output, and data input terminals through which write data having the predetermine length is input. Part of the address input terminals are also used as the data output terminals. In this way, the operation of successive reading and successive writing performed in succession at the same address can be made faster without increasing the number of terminals.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: August 21, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tatsuya Ishizaki
  • Patent number: 7907473
    Abstract: A semiconductor memory device for storing data defining a multidimensional space based on coordinate information of the data, includes: a cell array having memory cells arranged in a lattice pattern, for storing the data; a word line selector selecting and driving any one of a plurality of word lines which activate memory cells arranged in a row direction; write amplifiers/sense amplifiers writing/reading data to/from the memory cells arranged in a column direction; an amplifier selector inputting/outputting the data to/from the selected one of the write amplifiers/sense amplifiers; and an address conversion circuit generating a row address to be supplied to the word line selector based on the coordinate information of the data, and to generate a column address to be supplied to the amplifier selector by converting the coordinate information of the data into one-dimensional information.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: March 15, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tatsuya Ishizaki, Hironori Nakamura, Takayuki Kurokawa, Kenichi Ushikoshi
  • Publication number: 20110051534
    Abstract: A semiconductor storage device, in which successive reading and successive writing of data having a predetermined length from and to a memory cell specified by a certain address are performed, includes a plurality of memory cells, address input terminals through which the address is input, data output terminals through which read data having the predetermined length is output, and data input terminals through which write data having the predetermine length is input. Part of the address input terminals are also used as the data output terminals. In this way, the operation of successive reading and successive writing performed in succession at the same address can be made faster without increasing the number of terminals.
    Type: Application
    Filed: June 8, 2010
    Publication date: March 3, 2011
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tatsuya Ishizaki
  • Publication number: 20110013466
    Abstract: A semiconductor device includes multiple memory cells, a first and second digit lines, where either of them is coupled to the memory cell to be read, a sense amplifier having a first and second sense nodes that are respectively connected to the first and second digit lines, a first switch between the first digit line and the first sense node, a second switch between the second digit line and the second sense node, and a control circuit that outputs a first and second control signals for controlling a conducive state of the first and second switches. When an activation of the sense amplifier is started, the control circuit makes the first and second switches conductive and disconnects the first or second switch corresponding to the digit line to which the memory cell to be read is not connected according to a potential difference between the first and second sense nodes.
    Type: Application
    Filed: June 25, 2010
    Publication date: January 20, 2011
    Inventor: Tatsuya ISHIZAKI
  • Publication number: 20100312978
    Abstract: A computer system increases the confidentiality of a memory to be protected and prevents invalid access that is made, for example, by replacing the memory. The computer system includes a memory in which state information AA, which indicates whether or not information to be protected is stored in a predetermined memory area, and access permission information BB, which indicates whether or not access to the memory area is permitted, are stored; and an access control unit that rewrites the state information AA when information to be protected is written to, or deleted from, the memory area and at the same time, when the system is started, rewrites the access permission information BB to permit access to the memory area if information to be protected is not written in the memory area but, otherwise, rewrites the access permission information BB to the access inhibition state.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 9, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tatsuya Ishizaki
  • Patent number: 7664908
    Abstract: A semiconductor memory device adapted to burst transmission is provided for improving flexibility of data write operation. The semiconductor memory device is composed of a memory array, a set of write registers, and an input buffer designed to sequentially receive a series of write data during a burst cycle, and to write the write data into the associated write registers. The device also includes a write release register containing a set of write release flags associated with the write registers, respectively, and a write release register controller asserting the associated write release flags in response to the write data being written into the associated write registers. The device also contains a write amplifier designed to concurrently write the write data contained in the write registers associated with the asserted write release flags, selectively, when the burst cycle is aborted in response to a control signal.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: February 16, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Tatsuya Ishizaki
  • Publication number: 20090287888
    Abstract: To solve a problem in that it is difficult for a conventional semiconductor memory device to improve a data transfer rate, there is provided a semiconductor memory device including: a first sub-array (data sub-array) that holds write data input from an outside of the semiconductor memory device; an input data recognition circuit (21) that generates decision bit information associated with the write data based on a combination of data items contained in the write data; a second sub-array (decision sub-array) that holds the decision bit information; an internal address generation circuit (24) that generates an internal address for selectively specifying read data stored in the first sub-array, based on the decision bit information; and an output circuit (25) that outputs the read data selected by the internal address.
    Type: Application
    Filed: May 6, 2009
    Publication date: November 19, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Tatsuya ISHIZAKI
  • Publication number: 20090027993
    Abstract: According to an aspect of the present invention, there is provided a semiconductor memory device for storing data defining a multidimensional space based on coordinate information of the data, including: a cell array having memory cells arranged in a lattice pattern, for storing the data; a word line selector selecting and driving any one of a plurality of word lines which activate memory cells arranged in a row direction; write amplifiers/sense amplifiers writing/reading data to/from the memory cells arranged in a column direction; an amplifier selector inputting/outputting the data to/from the selected one of the write amplifiers/sense amplifiers; and an address conversion circuit generating a row address to be supplied to the word line selector based on the coordinate information of the data, and to generate a column address to be supplied to the amplifier selector by converting the coordinate information of the data into one-dimensional information.
    Type: Application
    Filed: July 9, 2008
    Publication date: January 29, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Tatsuya Ishizaki, Hironori Nakamura, Takayuki Kurokawa, Kenichi Ushikoshi
  • Patent number: 7024293
    Abstract: A collision determination system of the present invention includes a plurality of acceleration sensors provided in a bumper face of a vehicle for detecting the acceleration of deformation of the bumper face when the vehicle collides with an object. The system also includes an actuation permitter which, even when one of the acceleration sensors detects an acceleration equal to or more than a set value and it is determined that a collision occurs, refers to another acceleration sensor for operation. Under the AND conditions that an actuation permitting signal is supplied from the actuation permitter and a collision detection signal is supplied from a collision detector, an actuating signal output outputs an actuating signal for actuating collision mitigating devices.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: April 4, 2006
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Tatsuya Ishizaki, Kazuo Matsuda
  • Publication number: 20050265088
    Abstract: A semiconductor memory device adapted to burst transmission is provided for improving flexibility of data write operation. The semiconductor memory device is composed of: a memory array; a set of write registers; an input buffer designed to sequentially receive a series of write data during a burst cycle, and to write said write data into associated ones of said write registers; a write release register containing a set of write release flags associated with said write registers, respectively; a write release register controller asserting associated ones of said write release flags in response to said write data being written into said associated ones of said write registers; and a write amplifier designed to concurrently write said write data contained in said write registers associated with asserted ones of said write release flags, selectively, when said burst cycle is aborted in response to a control signal.
    Type: Application
    Filed: May 20, 2005
    Publication date: December 1, 2005
    Inventor: Tatsuya Ishizaki