Abstract: A radar apparatus includes an antenna unit that emits radar waves into space, a high-frequency circuit that receives, via the antenna unit, reflected waves of the radar waves reflected from a target, and a baseband circuit that converts reception signals output from the high-frequency circuit into digital baseband signals. A plurality of reception channels is formed in the antenna unit, the high-frequency circuit, and the baseband circuit. The baseband circuit includes: a baseband amplifier that amplifies reception signals output from the high-frequency circuit, and adds amplified parallel reception signals together, on a per reception-channel basis; and an analog-to-digital converter that converts an analog signal output from the baseband amplifier into a digital value.

Abstract: A radar device includes an antenna unit emitting a radar wave into space, a high frequency circuit receiving a reflected wave of the radar wave from a target via the antenna unit, and a baseband circuit converting a received signal outputted from the high frequency circuit into a baseband signal having a digital value. The radar device has a first mode for detecting the target at a relatively long distance and a second mode for detecting the target at a relatively short distance. Four or more receiving channels are configured in the antenna unit, high frequency circuit, and baseband circuit, a receiving channel number that is the number of the receiving channels on which the conversion processing to the baseband signal is performed is smaller in the second mode than the first mode, and speed of the conversion processing is faster in the second mode than the first mode.

Abstract: A radar device includes a transmission module and a reception module disposed separately from the transmission module. The transmission module includes: a transmission circuit unit mounted on the first surface of a circuit board; an antenna substrate provided on the second surface side of the circuit board; and a transmission antenna mounted on the second surface of the antenna substrate and not provided in a range on the back surface side of the antenna substrate corresponding to the range in which the circuit board is disposed. The reception module includes: a reception circuit unit mounted on the third surface of a circuit board; an antenna substrate provided on the fourth surface side of the circuit board; and a reception antenna mounted on the fourth surface of the antenna substrate and not provided in a range on the back surface side of the antenna substrate corresponding to the range in which the circuit board is disposed.

Abstract: A radar device utilizing frequency modulation of a frequency modulated continuous wave type, and includes a voltage-controlled oscillator generating a high frequency signal frequency-modulated based on a triangular wave voltage signal, a transmission antenna emitting the high frequency signal into the air, a receiving antenna receiving, as a reception signal, a reflected wave from a target object, of the high frequency signal, a mixer generating a beat signal having a frequency equal to a frequency difference between the reception signal and the high frequency signal, and a microcomputer calculating distance from the target object and relative velocity with respect to the target object, using the beat signal, and causing the initial voltage of the triangular wave voltage signal corresponding to second modulation scheme to be equal to that corresponding to first modulation scheme at a time of switching from the first modulation scheme to the second modulation scheme.

Abstract: A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern includes a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.

Abstract: Apparatus and associated methods relate to a bond-pad structure having small pad-substrate capacitance for use in high-voltage MOSFETs. The bond-pad structure includes upper and lower polysilicon plates interposed between a metal bonding pad and an underlying semiconductor substrate. The lower polysilicon plate is encapsulated in dielectric materials, thereby rendering it floating. The upper polysilicon plate is conductively coupled to a source of the high-voltage MOSFET. A perimeter of the metal bonding pad is substantially circumscribed, as viewed from a plan view perspective, by a perimeter of the upper polysilicon plate. A perimeter of the upper polysilicon plate is substantially circumscribed, as viewed from the plan view perspective, by a perimeter of the lower polysilicon plate. In some embodiments, the metal bonding pad is conductively coupled to a gate of the high-voltage MOSFET. The pad-substrate capacitance is advantageously made small by this bond-pad structure.

Abstract: A radar device includes a transmission module and a reception module disposed separately from the transmission module. The transmission module includes: a transmission circuit unit mounted on the first surface of a circuit board; an antenna substrate provided on the second surface side of the circuit board; and a transmission antenna mounted on the second surface of the antenna substrate and not provided in a range on the back surface side of the antenna substrate corresponding to the range in which the circuit board is disposed. The reception module includes: a reception circuit unit mounted on the third surface of a circuit board; an antenna substrate provided on the fourth surface side of the circuit board; and a reception antenna mounted on the fourth surface of the antenna substrate and not provided in a range on the back surface side of the antenna substrate corresponding to the range in which the circuit board is disposed.

Abstract: A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern includes a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.

Abstract: A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern includes a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.

Abstract: A frequency modulation circuit includes a VCO, a DIV, a MIX, a single-phase differential converter, and a signal processing circuit. The signal processing circuit performs differential arithmetic processing of an intermediate frequency signal with a program of a microcomputer according to a quadrature demodulation scheme and, thereafter, measures a frequency from phase information, performs n-th order polynomial (n is an integer equal to or larger than 2) approximation on time-frequency data of an IF signal output by a chirp modulation control voltage after inverse function correction, and performs modulation correction for correcting a time error.

Abstract: Apparatus and associated methods relate to a trench Metal-Oxide-Semiconductor Field-effect Transistor (MOSFET). The trench MOSFET includes a pair of longitudinal trenches formed in a semiconductor die, thereby forming an intervening longitudinal semiconductor pillar therebetween. Each of the pair of trenches has a field plates dielectrically isolated from a conductive gate. Each of the conductive gates is dielectrically isolated from the intervening semiconductor pillar via a gate dielectric. The thickness of the gate dielectric varies along a vertical dimension of the conductive gate, thereby providing a variation in a separation distance between each conductive gate and the intervening semiconductor pillar. The separation distance decreases from a gate/source overlap region to a channel inversion region. Such a varying separation distance can advantageously improve MOSFET operating parameters.

Abstract: Apparatus and associated methods relate to a bond-pad structure having small pad-substrate capacitance for use in high-voltage MOSFETs. The bond-pad structure includes upper and lower polysilicon plates interposed between a metal bonding pad and an underlying semiconductor substrate. The lower polysilicon plate is encapsulated in dielectric materials, thereby rendering it floating. The upper polysilicon plate is conductively coupled to a source of the high-voltage MOSFET. A perimeter of the metal bonding pad is substantially circumscribed, as viewed from a plan view perspective, by a perimeter of the upper polysilicon plate. A perimeter of the upper polysilicon plate is substantially circumscribed, as viewed from the plan view perspective, by a perimeter of the lower polysilicon plate. In some embodiments, the metal bonding pad is conductively coupled to a gate of the high-voltage MOSFET. The pad-substrate capacitance is advantageously made small by this bond-pad structure.

Abstract: A frequency modulation circuit [[110-1]] includes a VCO [[5]], a DIV [[19]], a MIX [[20]], a single-phase differential converter [[18]], and a signal processing circuit [[6]]. The signal processing circuit [[6]] performs differential arithmetic processing of an intermediate frequency signal with a program of a microcomputer according to a quadrature demodulation scheme and, thereafter, measures a frequency from phase information, performs n-th order polynomial (n is an integer equal to or larger than 2) approximation on time-frequency data of an IF signal output by a chirp modulation control voltage after inverse function correction, and performs modulation correction for correcting a time error.

Abstract: A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern includes a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.

Abstract: Apparatus and associated methods relate to a bonding pad structure for a trench-based semiconductor device. The bonding pad structure reduces a peak magnitude of the electric field between a metal bonding pad and the underlying semiconductor. The bonding pad structure includes a plurality of trenches vertically extending from a top surface of a semiconductor. Each of the plurality of trenches has dielectric sidewalls and a dielectric bottom, the dielectric sidewalls and dielectric bottom electrically isolating a conductive core within each of the trenches from a region of semiconductor outside of and adjacent to each of the plurality of trenches. The bonding pad structure includes a metal bonding pad disposed above the plurality of trenches, the metal bonding pad electrically isolated from the region of semiconductor outside of the trenches. The conductive core can be biased to reduce the magnitude of the field between adjacent trenches.

Abstract: Apparatus and associated methods relate to an edge-termination structure surrounding a high-voltage MOSFET for reducing a peak lateral electric field. The edge-termination structure includes a sequence of annular trenches and semiconductor pillars circumscribing the high-voltage MOSFET. Each of the annular trenches is laterally separated from the other annular trenches by one of the semiconductor pillars. Each of the annular trenches has dielectric sidewalls and a dielectric bottom electrically isolating a conductive core within each of the annular trenches from a drain-biased region of the semiconductor pillar outside of and adjacent to the annular trench. The conductive core of the innermost trench is biased, while the conductive cores of one or more outer trenches are floating. In some embodiments, a surface of an inner semiconductor pillar is biased as well. The peak lateral electric field can advantageously be reduced by physical arrangement of trenches and electrical biasing sequence.

Abstract: Apparatus and associated methods relate to an edge-termination structure surrounding a high-voltage MOSFET for reducing a peak lateral electric field. The edge-termination structure includes a sequence of annular trenches and semiconductor pillars circumscribing the high-voltage MOSFET. Each of the annular trenches is laterally separated from the other annular trenches by one of the semiconductor pillars. Each of the annular trenches has dielectric sidewalls and a dielectric bottom electrically isolating a conductive core within each of the annular trenches from a drain-biased region of the semiconductor pillar outside of and adjacent to the annular trench. The conductive core of the innermost trench is biased, while the conductive cores of one or more outer trenches are floating. In some embodiments, a surface of an inner semiconductor pillar is biased as well. The peak lateral electric field can advantageously be reduced by physical arrangement of trenches and electrical biasing sequence.

Abstract: Apparatus and associated methods relate to a bonding pad structure for a trench-based semiconductor device. The bonding pad structure reduces a peak magnitude of the electric field between a metal bonding pad and the underlying semiconductor. The bonding pad structure includes a plurality of trenches vertically extending from a top surface of a semiconductor. Each of the plurality of trenches has dielectric sidewalls and a dielectric bottom, the dielectric sidewalls and dielectric bottom electrically isolating a conductive core within each of the trenches from a region of semiconductor outside of and adjacent to each of the plurality of trenches. The bonding pad structure includes a metal bonding pad disposed above the plurality of trenches, the metal bonding pad electrically isolated from the region of semiconductor outside of the trenches. The conductive core can be biased to reduce the magnitude of the field between adjacent trenches.

Abstract: A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern including a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.

Abstract: A distance from the bottom of a mesa groove to an underlying pn junction exceeds the elongation of a depletion layer from the underlying pn junction that occurs when a voltage nearly equal to a target withstand voltage is applied, and a groove width of a section other than a corner of the mesa groove, that is, the groove width of a straight section, is nearly equal to the distance from the bottom of the mesa groove to the underlying pn junction.