Patents by Inventor Tatsuya Kawase

Tatsuya Kawase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120307
    Abstract: Provided is a semiconductor device reducing local increase in temperature caused by a void in a bonding material. A semiconductor device includes a conductive member, a semiconductor element, a bonding part, and a lead. The semiconductor element includes a switching element. The semiconductor element is held by the conductive member via a first bonding material. The bonding part is provided on an upper surface of the semiconductor element. The bonding part is electrically connected to an electrode of the switching element other than a gate electrode. The lead is bonded to the bonding part via a second bonding material. The bonding part and the second bonding material are provided in a region including a center part of the upper surface of the semiconductor element.
    Type: Application
    Filed: June 13, 2023
    Publication date: April 11, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsuya KAWASE, Naoki YOSHIMATSU
  • Patent number: 11955599
    Abstract: The present disclosure provides a negative electrode material that can improve the charge-discharge efficiency of a battery. A negative electrode material includes a reduced form of a first solid electrolyte material and a conductive auxiliary. The first solid electrolyte material is denoted by Formula (1): Li60M?X?. Herein, in Formula (1), each of ?, ?, and ? is a value greater than 0, M represents at least one element selected from the group consisting of metal elements except Li and semimetals, and X represents at least one element selected from the group consisting of F, Cl, Br, and I.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: April 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tatsuya Oshima, Izuru Sasaki, Seiji Nishiyama, Akira Kawase
  • Patent number: 11949064
    Abstract: The present disclosure provides a negative electrode material that can improve the cycle characteristics of a battery. The negative electrode material according to the present disclosure contains a reduced form of a solid electrolyte material. The solid electrolyte material is denoted by Formula (1): Li?M?X?. Herein, in Formula (1), each of ?, ?, and ? is a value greater than 0, M represents at least one element selected from the group consisting of metal dements except Li and semimetals, and X represents at least one dement selected from the group consisting of F, Cl, Br, and I.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: April 2, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tatsuya Oshima, Izuru Sasaki, Yuta Sugimoto, Seiji Nishiyama, Masashi Sakaida, Akira Kawase
  • Publication number: 20240097193
    Abstract: A solid electrolyte composition contains a solvent and an ion conductor dispersed in the solvent, the ion conductor including a solid electrolyte and a binder, wherein 0.40<S?/S?<0.80 is satisfied, where S? represents a specific surface area of the solid electrolyte, and S? represents a specific surface area of the ion conductor. For the solid electrolyte composition, 0.45<S?/S?<0.75 may be satisfied.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Inventors: TATSUYA OSHIMA, AKIO KANEYAMA, KAZUHIRO MORIOKA, AKIRA KAWASE
  • Publication number: 20230298984
    Abstract: A semiconductor device according to the disclosure includes a substrate, a semiconductor chip provided on the substrate, a nut, a lead frame provided on the semiconductor chip and the nut and screwed to the nut, a nut box accommodating the nut and having an opening which exposes the nut downward formed in a bottom portion and solder provided at least between the semiconductor chip and the substrate or the lead frame.
    Type: Application
    Filed: December 17, 2020
    Publication date: September 21, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Atsushi MAEDA, Tatsuya KAWASE
  • Publication number: 20230154808
    Abstract: A semiconductor apparatus includes: a base plate; an insulating circuit board including a ceramic substrate, a circuit pattern formed on an upper surface of the ceramic substrate, a metal layer formed on a lower surface of the ceramic substrate and fixed on an upper surface of the base plate with a first joint material; a semiconductor device having a first surface fixed on the circuit pattern with a second joint material and a second surface which is an opposite surface of the first surface; a lead frame fixed on the second surface with a third joint material; and a case fixed to an outer edge portion of the base plate and enclosing the semiconductor device, wherein restoring force acts on the insulating circuit board in a direction of warpage that is convex upward, and restoring force acts on the base plate in a direction of warpage that is convex downward.
    Type: Application
    Filed: October 23, 2020
    Publication date: May 18, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masaki KURACHI, Tatsuya KAWASE, Kentaro YOSHIDA
  • Patent number: 11638730
    Abstract: The present invention provides a combination therapy of genetically modified vaccinia virus (particularly oncolytic vaccinia virus) and another cancer therapy for use in treating cancer, and a pharmaceutical composition and a combination kit for use in the therapy. More specifically, the invention provides a therapy with vaccinia virus containing a polynucleotide encoding interleukin-7 (IL-7) and a polynucleotide encoding interleukin-12 (IL-12) in combination with an immune checkpoint inhibitor, and a pharmaceutical composition and a combination kit for use in the therapy.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: May 2, 2023
    Assignee: Astellas Pharma Inc.
    Inventors: Shinsuke Nakao, Tatsuya Kawase
  • Publication number: 20230130373
    Abstract: A semiconductor device includes: an insulating layer; a circuit pattern on an upper surface of the insulating layer; a semiconductor element bonded to an upper surface of the circuit pattern through a first bonding material; an insulating component bonded to the upper surface of the circuit pattern through a second bonding material; and a lead electrode connecting the semiconductor element to the insulating component, wherein an upper surface of the semiconductor element is bonded to a lower surface of the lead electrode through a third bonding material, an upper surface of the insulating component is bonded to the lower surface of the lead electrode through a fourth bonding material, and the first bonding material, the second bonding material, the third bonding material, and the fourth bonding material are made of a same material.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 27, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masayuki NISHIYAMA, Rei YONEYAMA, Naoki YOSHIMATSU, Shintaro ARAKI, Tatsuya KAWASE, Hiroyuki MASUMOTO
  • Patent number: 11450592
    Abstract: A semiconductor device according to the disclosure includes a first semiconductor chip, a second semiconductor chip, a first metal plate provided on an upper surface of the first semiconductor chip, a second metal plate provided on an upper surface of the second semiconductor chip and a sealing resin covering the first semiconductor chip, the second semiconductor chip, the first metal plate and the second metal plate, wherein a groove is formed in the sealing resin, the groove extending downwards from an upper surface of the sealing resin, the first metal plate includes, at an end facing the second metal plate, a first exposed portion exposed from a side face of the sealing resin forming the groove, and the second metal plate includes, at an end facing the first metal plate, a second exposed portion exposed from a side face of the sealing resin forming the groove.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: September 20, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroya Sannai, Kei Hayashi, Yosuke Nakata, Tatsuya Kawase, Yuji Imoto
  • Publication number: 20220285254
    Abstract: A semiconductor device includes a semiconductor element and a lead part. The semiconductor element is mounted on a circuit pattern provided on an insulating substrate. The lead part has a plate shape and is bonded to the semiconductor element with a first bonding material interposed therebetween. The lead part includes a lead body and a bonding component. The lead body includes an opening part provided corresponding to a mounting position of the semiconductor element. The bonding component is provided in the opening part and on the semiconductor element. The bonding component is bonded at a lower surface thereof to the semiconductor element by the first bonding material and bonded at an outer peripheral part thereof to an inner periphery of the opening part by a second bonding material.
    Type: Application
    Filed: October 17, 2019
    Publication date: September 8, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Atsushi MAEDA, Tatsuya KAWASE, Yuji IMOTO
  • Publication number: 20220157763
    Abstract: The object is to provide a technology of controlling warpage of a metal base plate occurring in temperature change from high temperature to room temperature by causing warpage in the metal base plate in temperature change from room temperature to high temperature. A dissimilar metal layer is formed on a surface of a metal base plate. An insulation substrate is joined to a surface of the dissimilar metal layer with a joining material being provided between the insulation substrate and the surface of the dissimilar metal layer, and includes metal plates disposed on both surfaces. ?1>?3>?2 is satisfied, where ?1 represents a linear expansion coefficient of the metal base plate, ?2 represents a linear expansion coefficient of the dissimilar metal layer, and ?3 represents a linear expansion coefficient of the metal plates.
    Type: Application
    Filed: June 6, 2019
    Publication date: May 19, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsuya KAWASE, Kei HAYASHI, Fumio WADA, Atsushi MAEDA
  • Patent number: 11239123
    Abstract: A base plate (1) includes a fixed surface and a radiating surface which is a surface opposite to the fixed surface. An insulating substrate (3) is bonded to the fixed surface of the base plate (1). Conductive patterns (4,5) are provided on the insulating substrate (3). Semiconductor chips (7,8) are bonded to the conductive pattern (4). An Al wire (12) connects top surfaces of the semiconductor chip (8) to the conductive pattern (5). The insulating substrate (3), the conductive patterns (4 ,5), the semiconductor chips (7 to 10) and the Al wires (11 to 13) are sealed with resin (16). The base plate (1) includes a metal part (19) and a reinforcing member (20) provided in the metal part (19). A Young's modulus of the reinforcing member (20) is higher than a Youngs modulus of the metal part (19).
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: February 1, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tatsuya Kawase, Noboru Miyamoto, Mikio Ishihara, Junji Fujino, Yuji Imoto, Naoki Yoshimatsu
  • Publication number: 20210315951
    Abstract: The present invention provides a combination therapy of genetically modified vaccinia virus (particularly oncolytic vaccinia virus) and another cancer therapy for use in treating cancer, and a pharmaceutical composition and a combination kit for use in the therapy. More specifically, the invention provides a therapy with vaccinia virus containing a polynucleotide encoding interleukin-7 (IL-7) and a polynucleotide encoding interleukin-12 (IL-12) in combination with an immune checkpoint inhibitor, and a pharmaceutical composition and a combination kit for use in the therapy.
    Type: Application
    Filed: September 25, 2019
    Publication date: October 14, 2021
    Applicant: ASTELLAS PHARMA INC.
    Inventors: Shinsuke NAKAO, Tatsuya KAWASE
  • Publication number: 20210225740
    Abstract: A semiconductor device according to the disclosure includes a first semiconductor chip, a second semiconductor chip, a first metal plate provided on an upper surface of the first semiconductor chip, a second metal plate provided on an upper surface of the second semiconductor chip and a sealing resin covering the first semiconductor chip, the second semiconductor chip, the first metal plate and the second metal plate, wherein a groove is formed in the sealing resin, the groove extending downwards from an upper surface of the sealing resin, the first metal plate includes, at an end facing the second metal plate, a first exposed portion exposed from a side face of the sealing resin forming the groove, and the second metal plate includes, at an end facing the first metal plate, a second exposed portion exposed from a side face of the sealing resin forming the groove.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 22, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroya SANNAI, Kei HAYASHI, Yosuke NAKATA, Tatsuya KAWASE, Yuji IMOTO
  • Patent number: 10905860
    Abstract: The vascular occlusion balloon catheter has a balloon, a main lumen, and a balloon expanding lumen. The balloon catheter has an air discharge passage. The air discharge passage has a distal end opening located at a position distal from the balloon and a proximal end communicating with an inner portion of the balloon. The distal end opening of the air discharge passage is positioned inside a portion disposed proximally from a distal end of the balloon catheter. The air discharge passage communicates with the main lumen at the distal end opening of the air discharge passage. The area of a cross section of the air discharge passage orthogonal to an axial direction of the balloon catheter is set to 200 ?m2 to 450 ?m2. The length of the air discharge passage is set to 1.0 to 3.0 mm.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: February 2, 2021
    Assignee: TERUMO CLINICAL SUPPLY CO., LTD.
    Inventors: Kazumi Goto, Tatsuya Kawase, Nozomi Nakanishi, Sayumi Hirose
  • Patent number: 10888594
    Abstract: The present invention provides a genetically recombinant vaccinia virus effective in preventing or treating cancer. Specifically, the present invention provides a vaccinia virus comprising two polynucleotides, a polynucleotide encoding IL-7 and a polynucleotide encoding IL-12; a combination kit of two vaccinia viruses, a vaccinia virus comprising a polynucleotide encoding IL-7 and a vaccinia virus comprising a polynucleotide encoding IL-12; and use of the two vaccinia viruses in combination.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: January 12, 2021
    Assignees: National University Corporation Tottori University, Astellas Pharma Inc.
    Inventors: Shinsuke Nakao, Tatsuya Kawase, Takafumi Nakamura
  • Patent number: 10849946
    Abstract: The present invention provides a genetically recombinant vaccinia virus effective in preventing or treating cancer. Specifically, the present invention provides a vaccinia virus comprising two polynucleotides, a polynucleotide encoding IL-7 and a polynucleotide encoding IL-12; a combination kit of two vaccinia viruses, a vaccinia virus comprising a polynucleotide encoding IL-7 and a vaccinia virus comprising a polynucleotide encoding IL-12; and use of the two vaccinia viruses in combination.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: December 1, 2020
    Assignees: National University Corporation Tottori University, Astellas Pharma Inc.
    Inventors: Shinsuke Nakao, Tatsuya Kawase, Takafumi Nakamura
  • Patent number: 10825751
    Abstract: In semiconductor device, a substrate unit includes an insulating substrate, a first conductor substrate and a second conductor substrate which are disposed on one main surface of the insulating substrate and spaced apart from each other, and a third conductor substrate which is disposed on the other main surface opposite to the one main surface of the insulating substrate. A terminal is connected to a surface of a semiconductor element opposite to the first conductor substrate. The terminal extends from a region above the semiconductor element to a region above the second conductor substrate while being connected to the second conductor substrate. At least a part of the terminal, the substrate unit and the semiconductor element is sealed by a resin. The third conductor substrate is exposed from the resin.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: November 3, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yosuke Nakata, Tatsuya Kawase, Mikio Ishihara, Noboru Miyamoto
  • Publication number: 20200338149
    Abstract: The present invention provides a genetically recombinant vaccinia virus effective in preventing or treating cancer. Specifically, the present invention provides a vaccinia virus comprising two polynucleotides, a polynucleotide encoding IL-7 and a polynucleotide encoding IL-12; a combination kit of two vaccinia viruses, a vaccinia virus comprising a polynucleotide encoding IL-7 and a vaccinia virus comprising a polynucleotide encoding IL-12; and use of the two vaccinia viruses in combination.
    Type: Application
    Filed: July 9, 2020
    Publication date: October 29, 2020
    Applicants: Astellas Pharma Inc., National University Corporation Tottori University
    Inventors: Shinsuke NAKAO, Tatsuya KAWASE, Takafumi NAKAMURA
  • Patent number: D903611
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: December 1, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroya Sannai, Tatsuya Kawase, Seiichiro Inokuchi, Naoki Higashikawa