Abstract: Provided is a phase shifter that shifts a phase of an input signal based on switching between a low-pass filter and a high-pass filter, the phase shifter including: a first field-effect transistor that is coupled between an input terminal and an output terminal; a resonance circuit that resonates when the first field-effect transistor is in an on-state; an additional line that is coupled between the resonance circuit and a node that is included in a signal line, which is formed between the input and output terminals when the first field-effect transistor is in the on-state; and an inductor that is included in a part of the signal line and forms a low-pass filter together with at least the additional line, when the first field-effect transistor is in the on-state.

Abstract: A bit phase shifter includes a plurality of phase shifters having phase shift amounts and connected in series through connection paths; and a first adjusting circuit provided in the connection path between every adjacent two of the plurality of phase shifters. The first adjusting circuit includes a first inductance which attains impedance matching to each of capacitances provided by the adjacent two phase shifters.

Abstract: A phase shifter includes a first signal path in which a first unit is disposed to advance a phase of a signal; a second signal path in which a second unit with no shunt capacitor is disposed to change the phase of the signal such that the changed phase is delayed than the advanced phase by the first unit; and a switch section configured to switch between the first signal path and said second signal path. The first unit comprises a filter, and the second unit is a transmission line.

Abstract: A phase shifter selectively switches between a low-pass filter 13 and a high-pass filter 12 using single pole double throw switches 10a and 10b provided on the input and output sides, respectively, and operatively linked to each other. The single pole double throw switches 10a and 10b include FETs Q1c and Q1d that connect single pole side junctions and the low-pass filter, respectively, and inductance circuits (L1c and R2c, and L1d and R2d) connected in parallel with FETs Q1c and Q1d, respectively. The inductance circuits are respectively comprised of the inductor L1c and the resistor R2c connected in series and of the inductor L1 d and the resistor R2d connected in series.

Abstract: Provided is a phase shifter that shifts a phase of an input signal based on switching between a low-pass filter and a high-pass filter, the phase shifter including: a first field-effect transistor that is coupled between an input terminal and an output terminal; a resonance circuit that resonates when the first field-effect transistor is in an on-state; an additional line that is coupled between the resonance circuit and a node that is included in a signal line, which is formed between the input and output terminals when the first field-effect transistor is in the on-state; and an inductor that is included in a part of the signal line and forms a low-pass filter together with at least the additional line, when the first field-effect transistor is in the on-state.

Abstract: A bit phase shifter includes a plurality of phase shifters having phase shift amounts and connected in series through connection paths; and a first adjusting circuit provided in the connection path between every adjacent two of the plurality of phase shifters. The first adjusting circuit includes a first inductance which attains impedance matching to each of capacitances provided by the adjacent two phase shifters.

Abstract: A phase shifter includes a first signal path in which a first unit is disposed to advance a phase of a signal; a second signal path in which a second unit with no shunt capacitor is disposed to change the phase of the signal such that the changed phase is delayed than the advanced phase by the first unit; and a switch section configured to switch between the first signal path and said second signal path. The first unit comprises a filter, and the second unit is a transmission line.

Abstract: A phase shifter selectively switches between a low-pass filter 13 and a high-pass filter 12 using single pole double throw switches 10a and 10b provided on the input and output sides, respectively, and operatively linked to each other. The single pole double throw switches 10a and 10b include FETs Q1c and Q1d that connect single pole side junctions and the low-pass filter, respectively, and inductance circuits (L1c and R2c, and L1d and R2d) connected in parallel with FETs Q1c and Q1d, respectively. The inductance circuits are respectively comprised of the inductor L1c and the resistor R2c connected in series and of the inductor L1 d and the resistor R2d connected in series.

Abstract: A board for high frequency device includes a plurality of electrode terminals connected to an electronic component or another electronic circuit board by flowable conducting material such as solder, and grooves formed in an electrode terminal of the plurality of electrode terminals and capable of accumulating solder or the like. Specifically, a high frequency component is mounted on the front surface of the high frequency device board, and the plurality of electrode terminals are formed on the rear surface of the high frequency device board. A ground electrode terminal included in the plurality of electrode terminals is formed at the center of the rear surface of the high frequency device board and connected to a ground. The grooves for accumulating solder or the like are formed in the ground electrode terminal. This reduces the possibility of short-circuit between adjacent electrode terminals due to the flowable conducting material such as solder.

Abstract: A high frequency module used as a unit circuit making up a phased array antenna, in which the module may be reduced in size with reduction in cost. A high frequency module 10 includes a dielectric substrate 1 having both surfaces metallized. The dielectric substrate has a first metallized layer 2 and a second metallized layer 3 formed on both surfaces and has a low noise amplifier and the phase shifter IC 9 mounted on the metallized layer 2 on one surface. The high frequency module 10 also includes a low noise transistor 7 and a distributed constant circuit 12, formed on the one surface of the dielectric substrate 1 to form the low noise amplifier together, and an input terminal 5, an output terminal 6 and power supply terminals 15A to 15D formed by leading out the metallized layer 2 on the one surface to the opposite side surface of the dielectric substrate 1 in such a manner as to maintain insulation from the metallized layer 3 on the opposite side surface.

Abstract: A board for high frequency device includes a plurality of electrode terminals connected to an electronic component or another electronic circuit board by flowable conducting material such as solder, and grooves formed in an electrode terminal of the plurality of electrode terminals and capable of accumulating solder or the like. Specifically, a high frequency component is mounted on the front surface of the high frequency device board, and the plurality of electrode terminals are formed on the rear surface of the high frequency device board. A ground electrode terminal included in the plurality of electrode terminals is formed at the center of the rear surface of the high frequency device board and connected to a ground. The grooves for accumulating solder or the like are formed in the ground electrode terminal. This reduces the possibility of short-circuit between adjacent electrode terminals due to the flowable conducting material such as solder.

Abstract: A high frequency module used as a unit circuit making up a phased array antenna, in which the module may be reduced in size with reduction in cost. A high frequency module 10 includes a dielectric substrate 1 having both surfaces metallized. The dielectric substrate has a first metallized layer 2 and a second metallized layer 3 formed on both surfaces and has a low noise amplifier and the phase shifter IC 9 mounted on the metallized layer 2 on one surface. The high frequency module 10 also includes a low noise transistor 7 and a distributed constant circuit 12, formed on the one surface of the dielectric substrate 1 to form the low noise amplifier together, and an input terminal 5, an output terminal 6 and power supply terminals 15A to 15D formed by leading out the metallized layer 2 on the one surface to the opposite side surface of the dielectric substrate 1 in such a manner as to maintain insulation from the metallized layer 3 on the opposite side surface.

Abstract: A semiconductor device having lead terminals bent in a J-shape is disclosed. A radiating plate having a recess formed on an outer peripheral portion thereof is exposed to a lower face of a resin member and free ends of outer portions of the lead terminals are positioned in the recess of the radiating plate. The free ends of the outer portions of the lead terminals and the recess of the radiating plate are isolated from each other by projections of the resin member. Since the radiating plate is exposed to the lower face of the resin member, the heat radiating property is high whereas the radiating plate and the lead terminals are not short-circuited to each other at all.

Abstract: A semiconductor device having a pellet mounted on a radiating plate thereof is disclosed. The radiating plate is formed in such a shape that a central portion thereof is positioned higher than both end portions thereof. A pellet is mounted on a lower face of the central portion of the radiating plate, and an upper face of the central portion of the radiating plate is exposed to the top of a resin member. Since the upper face of the central portion of the radiating plate which has the pellet mounted on the lower face thereof is exposed from the resin member, heat generated by the pellet can be radiated efficiently.

Abstract: A semiconductor device is disclosed wherein a pair of radiating terminals and a plurality of lead terminals are formed from a single lead frame. A hole or holes in each radiating terminal are formed with an equal width and in an equal pitch to those of gaps between the lead terminals, and the opposite sides of each hole of the radiating terminal are connected to each other by a support element. The support elements of the radiating terminals and support elements which interconnect the lead terminals are formed with an equal length and in an equal pitch to allow the support elements to be cut away by a plurality of punches which are arranged in an equal pitch and have an equal width.

Abstract: A plastic-encapsulated semiconductor device is provided, which is capable of efficient heat dissipation without upsizing while preventing the moisture from reaching an IC chip. This device is comprised of an electrically-conductive island having a chip-mounting area, an IC chip fixed on the chip-mounting area of the island, leads electrically connected to bonding pads of the chip through bonding wires, a plastic package for encapsulating the island, the chip, the bonding wires, and inner parts of the leads. The package has an approximately flat bottom face. Outer parts of the leads are protruded from the package and are located in approximately a same plane as the bottom face of the package. The island has an exposition part exposed from the package at a location excluding the chip-mounting area. A lower face of the exposition part of the island is located in approximately a same plane as the bottom face of the package. The chip and the chip-mounting area of the island are entirely buried in the package.

Abstract: A semiconductor device is disclosed wherein a pair of radiating terminals and a plurality of lead terminals are formed from a single lead frame. A hole or holes in each radiating terminal are formed with an equal width and in an equal pitch to those of gaps between the lead terminals, and the opposite sides of each hole of the radiating terminal are connected to each other by a support element. The support elements of the radiating terminals and support elements which interconnect the lead terminals are formed with an equal length and in an equal pitch to allow the support elements to be cut away by a plurality of punches which are arranged in an equal pitch and have an equal width.

Abstract: A semiconductor device of the present invention comprises a semiconductor pellet, a radiation plate mounted with the semiconductor pellet, a plurality of lead terminals electrically connected with the semiconductor pellet, and a resin member for encapsulating the above items. The resin member has a first surface and a second surface, and the radiation plate has a first portion exposed to the outside from the first surface of the resin member and a second portion exposed to the outside from the second surface of the resin member.

Abstract: A semiconductor device having lead terminals bent in a J-shape is disclosed. A radiating plate having a recess formed on an outer peripheral portion thereof is exposed to a lower face of a resin member and free ends of outer portions of the lead terminals are positioned in the recess of the radiating plate. The free ends of the outer portions of the lead terminals and the recess of the radiating plate are isolated from each other by projections of the resin member. Since the radiating plate is exposed to the lower face of the resin member, the heat radiating property is high whereas the radiating plate and the lead terminals are not short-circuited to each other at all.

Abstract: Disclosed is a semiconductor switch which has: a first resonance circuit which is composed so that a variable capacitance element and an inductor are in series connected and a series circuit composed of an inductor and a capacitor are in parallel connected to the variable capacitance element and the inductor, the first resonance circuit having one end connected to an input terminal and the other end connected to a first output terminal; a second resonance circuit which is composed like the first resonance circuit and is grounded to the first output terminal; a third resonance circuit which is composed like the first resonance circuit and is connected to the input terminal in parallel with the first resonance circuit, the third resonance circuit having a second output terminal on the reverse side of the input terminal; and a fourth resonance circuit which is composed like the first resonance circuit and is grounded to the second output terminal.