Patents by Inventor Tatsuya Shiraishi

Tatsuya Shiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929403
    Abstract: A method of manufacturing a semiconductor device includes: forming a trench in a semiconductor layer of first conductivity type; in the trench, forming a first layer containing silicon and then forming a second layer containing first oxide or nitride on the first layer or forming the second layer and then forming the first layer on the second layer; and thermally oxidizing the first layer.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 12, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Masaharu Shimabayashi, Tatsuya Shiraishi
  • Publication number: 20230307537
    Abstract: A semiconductor device of an embodiment includes a first electrode, a first semiconductor layer of first conductivity type provided on the first electrode; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench reaching the second semiconductor layer from above the first semiconductor region, a dielectric constant of an upper part of the first insulating film being higher than a dielectric constant of a lower part of the first insulating film; a second electrode provided in the trench, the second electrode facing the first semiconductor region; and a second insulating film provided between the second electrode and the first semiconductor region, the second insulating film being provided on the first insulating film in the trench.
    Type: Application
    Filed: September 6, 2022
    Publication date: September 28, 2023
    Inventor: Tatsuya Shiraishi
  • Publication number: 20230290854
    Abstract: A semiconductor device includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a gate wiring provided on the first insulating film, and a source electrode provided on the first insulating film. The device further includes a second insulating film provided on the gate wiring and the source electrode and including a portion sandwiched between the gate wiring and the source electrode, and a drain electrode provided below the semiconductor layer. Further, an upper surface of the first insulating film includes a first region having a first concentration of phosphorus and a second region having a second concentration of phosphorus that is higher than the first concentration. The first region is present between the semiconductor layer and the gate wiring or the source electrode, and the second region is present between the semiconductor layer and the portion of the second insulating film.
    Type: Application
    Filed: September 1, 2022
    Publication date: September 14, 2023
    Inventors: Kouta TOMITA, Tatsuya SHIRAISHI, Tatsuya NISHIWAKI
  • Patent number: 11715793
    Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: August 1, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi
  • Publication number: 20230117073
    Abstract: A state-monitoring device includes: a state estimating unit to estimate a state of an instrument using operation information of a train on which the instrument is mounted; an instrument arrangement storing unit to store instrument arrangement information indicating arrangement of the instrument in the train; and a work plan output unit to extract the instrument to be maintained that requires inspection or component replacement on the basis of a state estimation value of the instrument, and output information regarding maintenance work in which the instrument to be maintained and the instrument arrangement information are associated with each other.
    Type: Application
    Filed: February 25, 2020
    Publication date: April 20, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Koji WAKIMOTO, Takafumi UEDA, Osamu ARAI, Kentaro FUNATO, Tatsuya SHIRAISHI
  • Patent number: 11575039
    Abstract: A semiconductor device includes: a first electrode; a first semiconductor layer of first conductivity type provided on the first electrode; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a second semiconductor region of second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench between the first semiconductor region and the second semiconductor region, the trench reaching the second semiconductor layer from above the first semiconductor region and the second semiconductor region, the first insulating film containing silicon oxide; a second electrode provided in the trench, the second electrode facing the second semiconductor layer via the first insulating film, the second electrode containing polysilicon; a third electrode provided above the second electrode, the third electrode facing the first semicondu
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 7, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Shiraishi, Masaharu Shimabayashi
  • Patent number: 11437231
    Abstract: A method for manufacturing a semiconductor device includes forming a trench in a semiconductor wafer; and forming a first insulating film by thermally oxidizing the semiconductor wafer. The first insulating film covers an inner surface of the trench so that a first space remains in the trench. The first insulating film has a recessed portion at the bottom of the trench. The method further includes forming a semiconductor layer on the first insulating film, the semiconductor layer filling the first space and the recessed portion; forming a second space in the trench by selectively removing the semiconductor layer so that a portion of the semiconductor layer remains in the recessed portion; forming a second insulating film in the recessed portion by thermally oxidizing the portion of the semiconductor layer; and forming a first conductive body in the trench, the first conductive body filling the second space.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: September 6, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Tatsuya Shiraishi
  • Publication number: 20220093750
    Abstract: A method of manufacturing a semiconductor device includes: forming a trench in a semiconductor layer of first conductivity type; in the trench, forming a first layer containing silicon and then forming a second layer containing first oxide or nitride on the first layer or forming the second layer and then forming the first layer on the second layer; and thermally oxidizing the first layer.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 24, 2022
    Inventors: Masaharu SHIMABAYASHI, Tatsuya SHIRAISHI
  • Publication number: 20210391459
    Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.
    Type: Application
    Filed: August 27, 2021
    Publication date: December 16, 2021
    Inventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi
  • Publication number: 20210296490
    Abstract: A semiconductor device includes: a first electrode; a first semiconductor layer of first conductivity type provided on the first electrode; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a second semiconductor region of second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench between the first semiconductor region and the second semiconductor region, the trench reaching the second semiconductor layer from above the first semiconductor region and the second semiconductor region, the first insulating film containing silicon oxide; a second electrode provided in the trench, the second electrode facing the second semiconductor layer via the first insulating film, the second electrode containing polysilicon; a third electrode provided above the second electrode, the third electrode facing the first semicondu
    Type: Application
    Filed: September 4, 2020
    Publication date: September 23, 2021
    Inventors: Tatsuya Shiraishi, Masaharu Shimabayashi
  • Patent number: 11127854
    Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: September 21, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi
  • Publication number: 20210074540
    Abstract: A method for manufacturing a semiconductor device includes forming a trench in a semiconductor wafer; and forming a first insulating film by thermally oxidizing the semiconductor wafer. The first insulating film covers an inner surface of the trench so that a first space remains in the trench. The first insulating film has a recessed portion at the bottom of the trench. The method further includes forming a semiconductor layer on the first insulating film, the semiconductor layer filling the first space and the recessed portion; forming a second space in the trench by selectively removing the semiconductor layer so that a portion of the semiconductor layer remains in the recessed portion; forming a second insulating film in the recessed portion by thermally oxidizing the portion of the semiconductor layer; and forming a first conductive body in the trench, the first conductive body filling the second space.
    Type: Application
    Filed: March 9, 2020
    Publication date: March 11, 2021
    Inventor: Tatsuya Shiraishi
  • Publication number: 20210074848
    Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.
    Type: Application
    Filed: March 5, 2020
    Publication date: March 11, 2021
    Inventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi
  • Patent number: 10707317
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a first electrode, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a second electrode, and a third electrode. The first semiconductor region includes a first region and a second region. The second semiconductor region is provided on the second region. The third semiconductor region is provided on a portion of the second semiconductor region. The third electrode is provided on the second semiconductor region and the first semiconductor region. A first layer is provided on the third electrode. The first layer includes at least one selected from the group consisting of titanium, nickel, and vanadium. A second layer is provided on the first layer. The second layer includes silicon and at least one selected from the group consisting of nitrogen and oxygen.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: July 7, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Tatsuya Shiraishi
  • Patent number: 10493982
    Abstract: A vehicle control device includes a vehicle speed control unit configured to execute a vehicle speed control for automatically accelerating a vehicle, regardless of an accelerator operation. The vehicle speed control unit prohibits an execution of the vehicle speed control during a predetermined period, after a detection is made that the vehicle collided, and permits the execution of the vehicle speed control after an elapse of the predetermined period.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: December 3, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Tatsuya Shiraishi
  • Publication number: 20190288086
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a first electrode, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a second electrode, and a third electrode. The first semiconductor region includes a first region and a second region. The second semiconductor region is provided on the second region. The third semiconductor region is provided on a portion of the second semiconductor region. The third electrode is provided on the second semiconductor region and the first semiconductor region. A first layer is provided on the third electrode. The first layer includes at least one selected from the group consisting of titanium, nickel, and vanadium. A second layer is provided on the first layer. The second layer includes silicon and at least one selected from the group consisting of nitrogen and oxygen.
    Type: Application
    Filed: August 21, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Tatsuya SHIRAISHI
  • Patent number: 10287961
    Abstract: Provided is a construction machine including an exhaust-gas after-treatment device and capable of supporting the exhaust-gas after-treatment device in a limited space. The construction machine includes an upper frame, an engine mounted on the upper frame via a plurality of engine mounts, a hydraulic pump coupled to the engine, the exhaust-gas after-treatment device, and a support cradle supporting the exhaust-gas after-treatment device over the hydraulic pump. The upper frame includes a plurality of mount support portions and a leg support portion. The support cradle includes a support stage on which the exhaust-gas after-treatment device is mounted, and a plurality of legs. The plurality of mount support portions include a space-defining mount support portion defining a horizontal space against the hydraulic pump. The plurality of legs include an in-space leg extending in the space. The leg support portion is located to overlap the space in a plan view.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: May 14, 2019
    Assignee: KOBELCO CONSTRUCTION MACHINERY CO., LTD.
    Inventors: Toshiro Ueta, Tatsuya Shiraishi, Mari Sasaki, Takashi Tazoe
  • Patent number: 10141399
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a first insulating layer, and a first insulating region. The second semiconductor region is provided on the first semiconductor region. The first insulating layer is provided around at least a portion of the first semiconductor region and at least a portion of the second semiconductor region. The first insulating layer contacts the second semiconductor region. The first insulating region is provided around at least a portion of the first insulating layer.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: November 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Okumura, Masanobu Tsuchitani, Hiroto Misawa, Akira Ezaki, Tatsuya Shiraishi
  • Publication number: 20180076311
    Abstract: A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.
    Type: Application
    Filed: February 24, 2017
    Publication date: March 15, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu SAITO, Kohei OASA, Takuo KIKUCHI, Junji KATAOKA, Tatsuya SHIRAISHI, Akira YOSHIOKA, Kazuo SAKI
  • Patent number: 9917182
    Abstract: A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: March 13, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Kohei Oasa, Takuo Kikuchi, Junji Kataoka, Tatsuya Shiraishi, Akira Yoshioka, Kazuo Saki