Abstract: To provide a semiconductor device having improved performances. A semiconductor substrate has, in the surface layer portion thereof, an n+ type semiconductor region for source and an n+ type semiconductor region for drain separated from each other. The semiconductor substrate has, on the main surface thereof between the n+ type semiconductor region for source and the n+ type semiconductor region for drain, a gate electrode via an insulating film as a gate insulating film. The semiconductor substrate has, in the main surface thereof between the channel formation region below the gate electrode and the n+ type semiconductor region for drain, a LOCOS oxide film and an STI insulating. Of the LOCOS oxide film and the STI insulating film, the LOCOS oxide film is located on the side of the channel formation region and the STI insulating film is on the side of the n+ type semiconductor region DR for drain.

Abstract: To provide a semiconductor device having improved performances. A semiconductor substrate has, in the surface layer portion thereof, an n+ type semiconductor region for source and an n+ type semiconductor region for drain separated from each other. The semiconductor substrate has, on the main surface thereof between the n+ type semiconductor region for source and the n+ type semiconductor region for drain, a gate electrode via an insulating film as a gate insulating film. The semiconductor substrate has, in the main surface thereof between the channel formation region below the gate electrode and the n+ type semiconductor region for drain, a LOCOS oxide film and an STI insulating. Of the LOCOS oxide film and the STI insulating film, the LOCOS oxide film is located on the side of the channel formation region and the STI insulating film is on the side of the n+ type semiconductor region DR for drain.

Abstract: To provide, in a semiconductor device formed on an SOI substrate and having a semiconductor layer of the SOI substrate surrounded, at the periphery of the element region thereof, with element isolation, a technology capable of preventing reliability deterioration attributed to the element isolation. Appearance of a hollow, which is formed upon filling of a deep trench with an insulating film, from the upper surface of the insulating film can be prevented by setting the trench width of the upper portion of the deep trench configuring trench isolation at less than 1.2 ?m. Reduction in the breakdown voltage between adjacent element regions which may presumably occur due to a decrease in the trench width of the upper portion of the deep trench can be prevented by forming, on the upper portion of the deep trench, an LOCOS insulating film coupled to the insulating film filled in the deep trench.

Abstract: To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.

Abstract: To provide, in a semiconductor device formed on an SOI substrate and having a semiconductor layer of the SOI substrate surrounded, at the periphery of the element region thereof, with element isolation, a technology capable of preventing reliability deterioration attributed to the element isolation. Appearance of a hollow, which is formed upon filling of a deep trench with an insulating film, from the upper surface of the insulating film can be prevented by setting the trench width of the upper portion of the deep trench configuring trench isolation at less than 1.2 ?m. Reduction in the breakdown voltage between adjacent element regions which may presumably occur due to a decrease in the trench width of the upper portion of the deep trench can be prevented by forming, on the upper portion of the deep trench, an LOCOS insulating film coupled to the insulating film filled in the deep trench.

Abstract: To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.

Abstract: Provided is a semiconductor device about which the reliability thereof is certainly kept even when a void is generated in a buried film in its trench. A rectangular element formation region is formed in a silicon layer. A trench having a predetermined width is formed to surround the element formation region. A first TEOS film and a second TEOS film are buried in the trench. A protecting film is formed at an L-shaped intersection region of the trench.

Abstract: A method of manufacturing a thin film magnetic head includes forming a recording gap layer of a non-alumina base nonmagnetic material on a lower magnetic pole layer, the lower magnetic pole layer being composed of materials that are milled at the same rate. An upper magnetic pole layer is formed on the recording gap layer, and a single piece of equipment is used to trim the lower magnetic pole layer and pattern the recording magnetic gap layer such that the lower magnetic pole layer has a width that is substantially the same as that of the upper magnetic pole layer. The recording gap layer and the upper and lower half-gap layers are then removed over a region of the underlying substrate. Prescribed areas of tan air-bearing surface (ABS) are then etched to form a slider shape having a protruding part and a depressed part, the ABS and the side surface having a common edge such that the depressed part along the common edge extends into, but not beyond, the region.

Abstract: A non-volatile semiconductor memory device usable in relatively wide applications and a method of manufacturing the same are provided. A NOR-type flash memory region (2) including a NOR-type memory cell transistor and a DINOR-type flash memory region (3) including a DINOR-type memory cell transistor are manufactured into a single semiconductor chip (1). A peripheral circuit region (7) including a transistor for a peripheral circuit or the like is manufactured into a region surrounding the NOR-type flash memory region (2) and the DINOR-type flash memory region (3). The peripheral circuit region (7) is shareable between the NOR-type flash memory region (2) and the DINOR-type flash memory region (3) by electrical connection to both of the regions.

Abstract: A non-volatile semiconductor memory device usable in relatively wide applications and a method of manufacturing the same are provided. A NOR-type flash memory region (2) including a NOR-type memory cell transistor and a DINOR-type flash memory region (3) including a DINOR-type memory cell transistor are manufactured into a single semiconductor chip (1). A peripheral circuit region (7) including a transistor for a peripheral circuit or the like is manufactured into a region surrounding the NOR-type flash memory region (2) and the DINOR-type flash memory region (3). The peripheral circuit region (7) is shareable between the NOR-type flash memory region (2) and the DINOR-type flash memory region (3) by electrical connection to both of the regions.

Abstract: A non-volatile semiconductor memory device usable in relatively wide applications and a method of manufacturing the same are provided. A NOR-type flash memory region (2) including a NOR-type memory cell transistor and a DINOR-type flash memory region (3) including a DINOR-type memory cell transistor are manufactured into a single semiconductor chip (1). A peripheral circuit region (7) including a transistor for a peripheral circuit or the like is manufactured into a region surrounding the NOR-type flash memory region (2) and the DINOR-type flash memory region (3). The peripheral circuit region (7) is shareable between the NOR-type flash memory region (2) and the DINOR-type flash memory region (3) by electrical connection to both of the regions.

Abstract: Prevention of the formation of unwanted profiles in the ABS surface by etching of the slider ABS surface, even when gap layers are formed from non-alumina-base nonmagnetic materials differing from the component material of the substrate. Numerous thin film magnetic head elements, consisting of multiple layers including magnetic gap layers composed of nonmagnetic materials, are formed in a lattice array on the surface of a wafer. In the process of formation of these elements, the component materials of the magnetic gap layers existing in the region to be etched in order to form the slider shape are removed in advance. The wafer on the surface of which the elements are formed is cut into individual head blocks, and the surfaces opposing the magnetic recording media, consisting of a cut surface of said head block, are formed into a slider shape by etching.

Abstract: Providing a method for manufacturing a semiconductor device, with which it is possible to maintain an isolation breakdown voltage of a LOCOS isolation area high in a semiconductor device finely integrated.

Abstract: Prevention of the formation of unwanted profiles in the ABS surface by etching of the slider ABS surface, even when gap layers are formed from non-alumina-base nonmagnetic materials differing from the component material of the substrate. Numerous thin film magnetic head elements, consisting of multiple layers including magnetic gap layers composed of nonmagnetic materials, are formed in a lattice array on the surface of a wafer. In the process of formation of these elements, the component materials of the magnetic gap layers existing in the region to be etched in order to form the slider shape are removed in advance. The wafer on the surface of which the elements are formed is cut into individual head blocks, and the surfaces opposing the magnetic recording media, consisting of a cut surface of said head block, are formed into a slider shape by etching.

Abstract: Prevention of the formation of unwanted profiles in the ABS surface by etching of the slider ABS surface, even when gap layers are formed from non-alumina-base nonmagnetic materials differing from the component material of the substrate. Numerous thin film magnetic head elements, consisting of multiple layers including magnetic gap layers composed of nonmagnetic materials, are formed in a lattice array on the surface of a wafer. In the process of formation of these elements, the component materials of the magnetic gap layers existing in the region to be etched in order to form the slider shape are removed in advance. The wafer on the surface of which the elements are formed is cut into individual head blocks, and the surfaces opposing the magnetic recording media, consisting of a cut surface of said head block, are formed into a slider shape by etching.