Abstract: The present disclosure generally relates to dopant profile control in a heterojunction bipolar transistor (HBT). In an example, a semiconductor device structure includes a semiconductor substrate and an HBT. The HBT includes a collector region, a base region, and an emitter region. The base region is disposed on or over the collector region. The emitter region is disposed on or over the base region. The base region is disposed on or over the semiconductor substrate and includes a heteroepitaxial sub-layer. The heteroepitaxial sub-layer is doped with a dopant. A concentration gradient of the dopant increases from a region in a layer adjoining and overlying the heteroepitaxial sub-layer to a peak concentration in the heteroepitaxial sub-layer without decreasing between the region and the peak concentration.

Abstract: A semiconductor device includes a GaN FET on a silicon substrate and a buffer layer of III-N semiconductor material, with a columnar region, a transition region surrounding the columnar region, and an inter-columnar region around the transition region. The columnar region is higher than the inter-columnar region. The GaN FET includes a gate of III-N semiconductor material with a thickness greater than twice the vertical range of the top surface of the buffer layer in the columnar region. A difference between the gate thickness over the columnar region and over the transition region is less than half of the vertical range of the top surface of the buffer layer in the columnar surface. The semiconductor device may be formed by forming a gate layer of III-N semiconductor material over the barrier layer by a gate MOVPE process using a carrier gas that includes zero to 40 percent hydrogen gas.

Abstract: A semiconductor device include a first semiconductor layer with a first doping concentration. A second semiconductor layer has a second doping concentration and has a first surface and a second opposing surface. The second doping concentration is higher than the first doping concentration. The first surface of the second semiconductor layer is in contact with the first semiconductor layer. A contact is on the second surface of the second semiconductor layer. The contact includes a metal and a semiconductor.

Abstract: A method of forming a semiconductor device includes etching a high aspect ratio, substantially perpendicular trench in a semiconductor region doped with a first dopant having first conductivity type and performing a first cycle for depositing silicon doped with a second dopant on an inner surface of the high aspect ratio, substantially perpendicular trench, the first cycle comprising alternately depositing silicon at a first constant pressure and etching the deposited silicon at an etching pressure that ramps up from a first value to a second value, the second dopant having a second conductivity type that is opposite from the first conductivity type.

Abstract: A substrate processing apparatus includes a substrate having an SiGe film or Ge film exposed on at least a portion of a surface thereof, a process chamber configured to process the substrate, an etching gas supply part configured to supply an etching gas into the process chamber, a deposition gas supply part configured to supply gas containing at least an Si-containing gas as a deposition gas into the process chamber, and a control part configured to control the deposition gas supply part and the etching gas supply part so as to remove a Ge oxide film formed on a surface of the SiGe film or the Ge film by supplying the etching gas and to epitaxially grow an Si-containing film on at least the SiGe film or the Ge film by supplying the Si-containing gas after removing the Ge oxide film by the supply of the etching gas.

Abstract: A method for processing a substrate having an insulating film in at least a portion of a surface thereof, a source portion, a drain portion, and a gate portion thereon, and a monocrystalline silicon-based structure in a gate channel disposed under the gate portion. The method for processing a substrate includes: growing amorphous doped silicon and monocrystalline doped silicon by supplying at least silicon-containing gas and doping gas; and monocrystallizing the amorphous doped silicon by using the monocrystalline doped silicon as a seed by heating the amorphous doped silicon and the monocrystalline doped silicon.

Abstract: The external base electrode has a two-layered structure where a p-type polysilicon film doped with a medium concentration of boron is laminated on a p-type polysilicon film doped with a high concentration of boron. Therefore, since the p-type polysilicon film doped with a high concentration of boron is in contact with an intrinsic base layer at a junction portion between the external base electrode and the intrinsic base layer, the resistance of the junction portion can be reduced. In addition, since the resistance of the external base electrode becomes a parallel resistance of the two layers of the p-type polysilicon films, the resistance of the p-type polysilicon film whose boron concentration is relatively lower is dominant.

Abstract: The external base electrode has a two-layered structure where a p-type polysilicon film doped with a medium concentration of boron is laminated on a p-type polysilicon film doped with a high concentration of boron. Therefore, since the p-type polysilicon film doped with a high concentration of boron is in contact with an intrinsic base layer at a junction portion between the external base electrode and the intrinsic base layer, the resistance of the junction portion can be reduced. In addition, since the resistance of the external base electrode becomes a parallel resistance of the two layers of the p-type polysilicon films, the resistance of the p-type polysilicon film whose boron concentration is relatively lower is dominant.

Abstract: Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.

Abstract: Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.