Patents by Inventor Tatsuya Umeda

Tatsuya Umeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240068732
    Abstract: A refrigerator includes a controller wherein the controller detects opening and closing of a door during a normal temperature control in which a compartment temperature of a first storage compartment is maintained at a normal set temperature, to supply cold air to the first storage compartment for a first time period, in a case where the controller detects, via a temperature detection unit within the first time period, a temperature rise range equal to or more than a temperature rise range set in advance, cause the compartment temperature to shift to a first set temperature lower than the normal set temperature for a second time period and, thereafter, cause the compartment temperature to shift to a second set temperature higher than the normal set temperature for a third time period and then cause the compartment temperature to shift to the first set temperature for a fourth time period.
    Type: Application
    Filed: February 9, 2021
    Publication date: February 29, 2024
    Inventors: Takashi ITO, Hiroaki YOKOO, Tatsuya UMEDA
  • Patent number: 6711726
    Abstract: A buffer cell and an inverter cell are embedded in advance in an internal open space of each of mega-cells and IO cells composing a semiconductor integrated circuit. Thereafter, in cases where it is expected that a cross-talk noise is generated in a signal transmitting through a particular wire of the semiconductor integrated circuit, one mega-cell or one IO cell, which is placed in a position nearest to a generation position of the cross-talk noise, is selected from the mega-cells and the IO cells, and the buffer cell or the inverter cell embedded in the selected mega-cell or the selected IO cell is inserted into the particular wire. Therefore, because the capacitance between the particular wire and each wire adjacent to the particular wire is reduced, the cross-talk noise can be reduced.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: March 23, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Koji Hirakimoto, Ken Saito, Tatsuya Umeda
  • Publication number: 20020046389
    Abstract: A buffer cell and an inverter cell are embedded in advance in an internal open space of each of mega-cells and IO cells composing a semiconductor integrated circuit. Thereafter, in cases where it is expected that a cross-talk noise is generated in a signal transmitting through a particular wire of the semiconductor integrated circuit, one mega-cell or one IO cell, which is placed in a position nearest to a generation position of the cross-talk noise, is selected from the mega-cells and the IO cells, and the buffer cell or the inverter cell embedded in the selected mega-cell or the selected IO cell is inserted into the particular wire. Therefore, because the capacitance between the particular wire and each wire adjacent to the particular wire is reduced, the cross-talk noise can be reduced.
    Type: Application
    Filed: April 9, 2001
    Publication date: April 18, 2002
    Inventors: Koji Hirakimoto, Ken Saito, Tatsuya Umeda