Abstract: Differential chopper type comparator including a switching circuit which switches between a reference signal and an input signal according to a connected first period and second period, first and second comparator circuits, and a differential comparator circuit differentially comparing the outputs of the first and second comparator circuits. Each of the first and second comparator circuits comprises a capacitor, an inverter serially connected to the capacitor, and a switch that short-circuits the input/output terminal of the inverter during the first period. The first and second comparator circuits operate in tandem such that the reference signal is input to the firs comparator circuit during the first period when the inverter is short-circuited, while conversely the input signal is input to the second comparator circuit during the first period when its inverter is short-circuited, with the reverse occurring with respect to the first and second comparator circuits during the second period.