Patents by Inventor Tatsuyuki Okubo
Tatsuyuki Okubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230120615Abstract: A semiconductor manufacturing apparatus includes a thrust-up unit having a plurality of blocks in contact with a dicing tape, a head having a collet absorbing the die and capable of being moved up and down, and a control section controlling the operation of the thrust-up unit and the head. The thrust-up unit can operate each of the plurality of blocks independently. The control section configures the thrust-up sequences of the plurality of blocks in a plurality of steps, and controls the operation of the plurality of blocks on the basis of a time chart recipe capable of setting the height and the speed of the plurality of blocks for each block and in each step.Type: ApplicationFiled: December 16, 2022Publication date: April 20, 2023Inventors: Tsuyoshi YOKOMORI, Tatsuyuki OKUBO, Yuki NAKUI, Hiroshi MAKI, Akira SAITO, Naoki OKAMOTO
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Patent number: 11569118Abstract: A semiconductor manufacturing apparatus includes a thrust-up unit having a plurality of blocks in contact with a dicing tape, a head having a collet absorbing the die and capable of being moved up and down, and a control section controlling the operation of the thrust-up unit and the head. The thrust-up unit can operate each of the plurality of blocks independently. The control section configures the thrust-up sequences of the plurality of blocks in a plurality of steps, and controls the operation of the plurality of blocks on the basis of a time chart recipe capable of setting the height and the speed of the plurality of blocks for each block and in each step.Type: GrantFiled: March 9, 2020Date of Patent: January 31, 2023Assignee: Fasford Technology Co., Ltd.Inventors: Tsuyoshi Yokomori, Tatsuyuki Okubo, Yuki Nakui, Hiroshi Maki, Akira Saito, Naoki Okamoto
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Publication number: 20200312699Abstract: A semiconductor manufacturing apparatus includes a thrust-up unit having a plurality of blocks in contact with a dicing tape, a head having a collet absorbing the die and capable of being moved up and down, and a control section controlling the operation of the thrust-up unit and the head. The thrust-up unit can operate each of the plurality of blocks independently. The control section configures the thrust-up sequences of the plurality of blocks in a plurality of steps, and controls the operation of the plurality of blocks on the basis of a time chart recipe capable of setting the height and the speed of the plurality of blocks for each block and in each step.Type: ApplicationFiled: March 9, 2020Publication date: October 1, 2020Inventors: Tsuyoshi YOKOMORI, Tatsuyuki OKUBO, Yuki NAKUI, Hiroshi MAKI, Akira SAITO, Naoki OKAMOTO
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Patent number: 8703583Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: GrantFiled: November 13, 2009Date of Patent: April 22, 2014Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Publication number: 20130299098Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: ApplicationFiled: July 14, 2013Publication date: November 14, 2013Inventors: Hiroshi MAKI, Tsuyoshi YOKOMORI, Tatsuyuki OKUBO
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Publication number: 20130276989Abstract: A paste applying apparatus and method apply a paste within an application area. A drawing pattern is determined in advance, within the application area, for each of the application areas, and the drawing pattern has, at least, a first drawing route and a fifth drawing route for drawing in horizontal direction, a second drawing route and a fourth drawing route for drawing obliquely, and further a third drawing route, in vicinity of a side of the application area in the horizontal direction. A controller portion controls the discharge portion and the moving portion, so that the paste is applied, continuously, from a drawing start-point to a drawing end-point, which are determined in advance, through the first drawing route, the second drawing route, the third drawing route, the fourth drawing route and the fifth drawing route.Type: ApplicationFiled: August 16, 2012Publication date: October 24, 2013Inventors: Tatsuyuki OKUBO, Mitsuo Yoda, Shigeru Otake
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Patent number: 8492173Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: GrantFiled: January 16, 2013Date of Patent: July 23, 2013Assignee: Renesas Electonics CorporationInventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Patent number: 8460491Abstract: The present invention provides die bonder and bonding method by which a bonding load from a high load to a low load is obtained or high-speed mounting is attained. In a die bonder or a bonding method in which a bonding head is ascended/descended by a first ascending/descending drive shaft unit, a die is picked up, the picked-up die is installed onto a workpiece, and after installed, a load is exerted on the die by the bonding head to bond the die to the workpiece, whether the load is higher/lower than a predetermined load is determined, and in bonding, when the load is higher than the predetermined load, the high load is exerted by the first ascending/descending drive shaft unit, and when the load is lower than the predetermined load, the low load is exerted by a second ascending/descending drive shaft unit.Type: GrantFiled: March 7, 2012Date of Patent: June 11, 2013Assignee: Hitachi High-Tech Instruments Co., Ltd.Inventors: Shingo Fukasawa, Tatsuyuki Okubo, Yoshihiro Kurihara
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Patent number: 8372665Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: GrantFiled: June 26, 2012Date of Patent: February 12, 2013Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Publication number: 20120270340Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: ApplicationFiled: June 26, 2012Publication date: October 25, 2012Inventors: HIROSHI MAKI, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Patent number: 8222050Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: GrantFiled: August 11, 2011Date of Patent: July 17, 2012Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Publication number: 20110290427Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: ApplicationFiled: August 11, 2011Publication date: December 1, 2011Inventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Patent number: 8003495Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: GrantFiled: January 10, 2011Date of Patent: August 23, 2011Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Publication number: 20110097849Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: ApplicationFiled: January 10, 2011Publication date: April 28, 2011Inventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Patent number: 7888141Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: GrantFiled: June 11, 2008Date of Patent: February 15, 2011Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Publication number: 20100055878Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: ApplicationFiled: November 13, 2009Publication date: March 4, 2010Inventors: Hiroshi MAKI, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Patent number: 7629231Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: GrantFiled: April 16, 2007Date of Patent: December 8, 2009Assignee: Renesas Technology Corp.Inventors: Hiroshi Maki, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo
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Publication number: 20080318346Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: ApplicationFiled: June 11, 2008Publication date: December 25, 2008Inventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Publication number: 20070275544Abstract: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.Type: ApplicationFiled: April 16, 2007Publication date: November 29, 2007Inventors: Hiroshi Maki, Masayuki Mochizuki, Ryuichi Takano, Yoshiaki Makita, Haruhiko Fukasawa, Keisuke Nadamoto, Tatsuyuki Okubo