Patents by Inventor Tatyana N. Andreyushchenko

Tatyana N. Andreyushchenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method to fabricate interconnect structures
    Patent number: 7476974
    Abstract: A method includes forming a barrier layer on a substrate surface including at least one contact opening; forming an interconnect in the contact opening; and reducing the electrical conductivity of the barrier layer. A method including forming a barrier layer on a substrate surface including a dielectric layer and a contact opening, depositing a conductive material in the contact opening, removing the conductive material sufficient to expose the barrier layer on the substrate surface, and reducing the electrical conductivity of the barrier layer. An apparatus including a circuit substrate including at least one active layer including at least one contact point, a dielectric layer on the at least one active layer, a barrier layer on a surface of the dielectric layer, a portion of the barrier layer having been transformed from a first electrical conductivity to a second different and reduced electrical conductivity, and an interconnect coupled to the at least one contact point.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: January 13, 2009
    Assignee: Intel Corporation
    Inventors: Tatyana N. Andreyushchenko, Kenneth Cadien, Paul Fischer, Valery M. Dubin
  • Method to fabricate interconnect structures
    Patent number: 7087517
    Abstract: A method includes forming a barrier layer on a substrate surface including at least one contact opening; forming an interconnect in the contact opening; and reducing the electrical conductivity of the barrier layer. A method including forming a barrier layer on a substrate surface including a dielectric layer and a contact opening, depositing a conductive material in the contact opening, removing the conductive material sufficient to expose the barrier layer on the substrate surface, and reducing the electrical conductivity of the barrier layer. An apparatus including a circuit substrate including at least one active layer including at least one contact point, a dielectric layer on the at least one active layer, a barrier layer on a surface of the dielectric layer, a portion of the barrier layer having been transformed from a first electrical conductivity to a second different and reduced electrical conductivity, and an interconnect coupled to the at least one contact point.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: August 8, 2006
    Assignee: Intel Corporation
    Inventors: Tatyana N. Andreyushchenko, Kenneth Cadien, Paul Fischer, Valery M. Dubin