Patents by Inventor Taufik

Taufik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11699953
    Abstract: Methods, systems, and apparatuses for efficient power supply and voltage division are described. Specifically, the described zero-voltage switching hybrid voltage divider (ZVS-HVD) may implement capacitor-inductor switching (e.g., a capacitor-inductor switching combination) to provide a zero-voltage switching bidirectional voltage divider converter. The ZVD-HVD may be implemented, in the example of a two-to-one ratio divider, via a configuration of three switches, three capacitors, and two small size inductors (e.g., to achieve zero voltage switching in any condition). In some examples, the ZVS-HVD may be realized via two of the switches sharing a same switching signal (e.g., the two-to-one ratio divider example of the described ZVS-HVD may be associated with two circuit states via the three switches). The described ZVS-HVD may support continuous input current, parallelizability, insensitivity to parasitic inductance, and high efficiency (e.g., reduced energy loss) at light load, among other features.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: July 11, 2023
    Assignee: Cal Poly Corporation
    Inventors: Taufik, Owen Jong
  • Publication number: 20210408904
    Abstract: Methods, systems, and apparatuses for efficient power supply and voltage division are described. Specifically, the described zero-voltage switching hybrid voltage divider (ZVS-HVD) may implement capacitor-inductor switching (e.g., a capacitor-inductor switching combination) to provide a zero-voltage switching bidirectional voltage divider converter. The ZVD-HVD may be implemented, in the example of a two-to-one ratio divider, via a configuration of three switches, three capacitors, and two small size inductors (e.g., to achieve zero voltage switching in any condition). In some examples, the ZVS-HVD may be realized via two of the switches sharing a same switching signal (e.g., the two-to-one ratio divider example of the described ZVS-HVD may be associated with two circuit states via the three switches). The described ZVS-HVD may support continuous input current, parallelizability, insensitivity to parasitic inductance, and high efficiency (e.g., reduced energy loss) at light load, among other features.
    Type: Application
    Filed: June 4, 2021
    Publication date: December 30, 2021
    Inventors: Taufik, Owen Jong
  • Patent number: 7782032
    Abstract: A multiphase buck DC to DC converter with an input-output LC tank. The multiphase buck DC to DC converter with an input-output LC tank includes multiple synchronous buck DC to DC converter cells. Each one of the synchronous buck DC to DC converter cells having an input node, an output node and a control node. The synchronous buck DC to DC converter cells are arranged in a parallel configuration including having the input nodes of each one of the synchronous buck DC to DC converter cells connected together at a common input node. The synchronous buck DC to DC converter cells are also arranged in pairs of synchronous buck DC to DC converter cells. The output nodes of each one of the pairs of the synchronous buck DC to DC converter cells are connected to corresponding pair output node.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: August 24, 2010
    Assignee: California Polytechnic Corporation
    Inventors: Taufik, Dodi Garinto, Ian O. Waters, Kay K. Ohn
  • Publication number: 20090140706
    Abstract: A multiphase buck DC to DC converter with an input-output LC tank. The multiphase buck DC to DC converter with an input-output LC tank includes multiple synchronous buck DC to DC converter cells. Each one of the synchronous buck DC to DC converter cells having an input node, an output node and a control node. The synchronous buck DC to DC converter cells are arranged in a parallel configuration including having the input nodes of each one of the synchronous buck DC to DC converter cells connected together at a common input node. The synchronous buck DC to DC converter cells are also arranged in pairs of synchronous buck DC to DC converter cells. The output nodes of each one of the pairs of the synchronous buck DC to DC converter cells are connected to corresponding pair output node.
    Type: Application
    Filed: September 22, 2008
    Publication date: June 4, 2009
    Inventors: Taufik, Dodi Garinto, Ian O. Waters, Kay K. Ohn