Patents by Inventor Tawfik Lazraq

Tawfik Lazraq has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6330435
    Abstract: An algorithm complementary to the Selective Repeat ARQ technique is provided, that allows obsolete or otherwise superfluous packets to be safely discarded at the transmitter when using the Selective Repeat ARQ technique. Thus, clogging of ARQ buffers and deadlocking of the system can be avoided, and data transfer in mobile wireless environments using Selective Repeat ARQ can be made more efficient. In accordance with various embodiments of the algorithm, a data packet discard notification (DPDN) message is sent by the transmitter to the receiver to indicate to the receiver which packets the transmitter has discarded, so that the receiver need no longer expect to receive them. The DPDN message can be sent when the transmitter discards packets. The DPDN message can also be sent in response to a communication such as a request or negative acknowledgment that is sent by the receiver to the transmitter.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: December 11, 2001
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Tawfik Lazraq, Farooq Khan
  • Patent number: 6091728
    Abstract: An ATM-switch for high transmission rates is built of primary switch cores. A path for a cell through the switch is determined at the arrival of the cell at the switch and this path is coded as a control word, which is transferred through the switch in parallel to the cell itself. The control word indicates directly how the transfer through each primary element of the switch is to be made. Each primary element must only have two inputs and two outputs. The control word then consists of one bit for every stage of primary switch elements in the switch and this bit indicates directly the output from which the cell is to be forwarded from a considered switch element. The switch cores are constructed of intermediate storage memories, one for each pair of one input and one output, and these intermediate storage memories can have a rather limited capacity for storing only a few cells together with their associated control words.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: July 18, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Tawfik Lazraq, P. Bergstedt, Hannu Tenhunen, Mehran Mikhtari