Patents by Inventor Te Chang

Te Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240127988
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.
    Type: Application
    Filed: March 2, 2023
    Publication date: April 18, 2024
    Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
  • Publication number: 20240127989
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.
    Type: Application
    Filed: January 25, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
  • Publication number: 20240126006
    Abstract: A backlight module comprises an outer frame unit, a light guide plate arranged in the outer frame unit, a light-emitting unit, a plurality of adhesives for fixing the light-emitting unit on the light guide plate, and a plurality of abutting structures. The light-emitting unit includes a flexible circuit board and a plurality of light-emitting elements arranged on the flexible circuit board at intervals. Part of the flexible circuit board is deformed at a specific position by the abutting structures, and the position of the light-emitting elements relative to the light guide plate can be adjusted. Thereby, the light-emitting elements can be aligned with the light incident surface of the light guide plate, prevent light from leaking from the light emitting surface of the light guide plate close to the light-emitting elements, and reduce the generation of bright lines and improving the overall uniformity. The present invention also provides a display device including the backlight module.
    Type: Application
    Filed: September 14, 2023
    Publication date: April 18, 2024
    Applicant: Radiant Opto-Electronics Corporation
    Inventors: Chih-Hsiang CHEN, Cheng-Te CHANG
  • Publication number: 20240096411
    Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a series of sensing operations respectively corresponding to a plurality of sensing voltages, wherein a sensing voltage of a specific sensing operation of the series of sensing operations has a sensing voltage determined according to a result of an initial sensing operation of the series of sensing operations; determining a threshold voltage of the Flash cell according to at least a digital value generated by the series of sensing operations; and using the determined threshold voltage to perform soft decoding of the Flash cell.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
  • Patent number: 11935894
    Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
  • Patent number: 11935935
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, Wei-Gang Chiu, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin
  • Patent number: 11927303
    Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: March 12, 2024
    Assignee: HTC Corporation
    Inventors: Tsen-Wei Kung, Chung-Ju Wu, Tsung Hua Yang, Chih-Yao Chang, Wei Te Tu
  • Publication number: 20240077616
    Abstract: A time-of-flight sensor includes a substrate, a single photon avalanche detection chip, a vertical cavity surface-emitting laser, a first narrowband pass filter glass, and a second narrowband pass filter glass and a resin shell. The single photon avalanche detection chip is attached on the substrate, and the vertical cavity surface-emitting laser is also attached on the substrate. The first narrowband pass filter glass is arranged above the single photon avalanche detection chip, and the second narrowband pass filter glass is arranged above the vertical cavity surface-emitting laser. The resin shell covers the first narrowband pass filter glass and the second narrowband pass filter glass, and an upper surface of the first narrowband pass filter glass and an upper surface of the second narrowband pass filter glass are coplanar with an upper surface of the resin shell.
    Type: Application
    Filed: November 13, 2022
    Publication date: March 7, 2024
    Inventors: Chun-Te CHANG, Chung Wu LIU
  • Publication number: 20240071818
    Abstract: A semiconductor device and method of fabricating the same include a substrate, a first epitaxial layer, a first protection layer, and a contact etching stop layer. The substrate includes a PMOS transistor region, and the first epitaxial layer is disposed on the substrate, within the PMOS transistor region. The first protection layer is disposed on the first epitaxial layer, covering surfaces of the first epitaxial layer. The contact etching stop layer is disposed on the first protection layer and the substrate, wherein a portion of the first protection layer is exposed from the contact etching stop layer.
    Type: Application
    Filed: September 22, 2022
    Publication date: February 29, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: I-Wei Chi, Te-Chang Hsu, Yao-Jhan Wang, Meng-Yun Wu, Chun-Jen Huang
  • Publication number: 20240071553
    Abstract: An example method of performing memory access operations comprises: receiving a request to perform a memory access operation with respect to a set of memory cells connected to a wordline of a memory device; identifying a block family associated with the set of memory cells; determining, for each logical programming level of a plurality of logical programming levels, a corresponding default block family error avoidance (BFEA) threshold voltage offset value associated with the block family; determining a value of a data state metric associated with the set of memory cells; responsive to determining that the value of the data state metric satisfies a threshold criterion, determining, for each logical programming level of a plurality of logical programming levels, a corresponding sub-BFEA threshold voltage offset value; and performing the memory access operation by applying, for each logical programming level of the plurality of logical programming levels, a combination of the default BFEA threshold voltage value
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: Li-Te Chang, Yu-Chung Lien, Murong Lang, Zhenming Zhou, Michael G. Miller
  • Publication number: 20240062834
    Abstract: A processing device in a memory sub-system detects an occurrence of a data integrity check trigger event in the memory sub-system, and in response, identifies a memory die of a plurality of memory dies in the memory sub-system. The processing device further determines a read margin associated with a first distribution of memory cells of the identified memory die, and determines an adaptive scan frequency for the identified memory die based on the read margin associated with the first distribution of memory cells.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Inventors: Li-Te Chang, Murong Lang, Zhenming Zhou
  • Patent number: 11901437
    Abstract: A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.
    Type: Grant
    Filed: May 15, 2022
    Date of Patent: February 13, 2024
    Assignee: Marlin Semiconductor Limited
    Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang
  • Publication number: 20240045595
    Abstract: A processing device in a memory sub-system determines whether a media endurance metric associated with a memory block of a memory device satisfies one or more conditions. In response to the one or more conditions being satisfied, one or more read margin levels corresponding to a page type associated with the memory device are determined. A machine learning model is applied to the one or more read margin levels to generate a margin prediction value based on the page type and a wordline group associated with the memory device. Based on the margin prediction value, the memory device is assigned to a selected bin of a set of bins. A media scan operation is executed on the memory device in accordance with a scan frequency associated with the selected bin.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: Li-Te Chang, Murong Lang, Charles See Yeung Kwong, Vamsi Pavan Rayaprolu, Seungjune Jeon, Zhenming Zhou
  • Publication number: 20240029802
    Abstract: An example system can include a memory device and a processing device. The memory device can include a group of memory cells. The processing device can be coupled to the memory device. The processing device can be configured to determine a distance of a memory die from a center of a memory component. The processing device can be configured to perform a read disturb operation on the memory die based on the determined distance use a first voltage window for a set of memory cells of the group of memory cells during a first time period.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 25, 2024
    Inventors: Zhenming Zhou, Murong Lang, Li-Te Chang
  • Publication number: 20240021264
    Abstract: Methods, systems, and devices for read window management in a memory system are described. A memory system may determine, for a set of memory cells, a first value for a read window that is associated with a set of one or more threshold voltages each representing a different multi-bit value. The memory system may then use the first value for the read window to predict a second value for the read window. Based on the second value for the read window, the memory system may predict an error rate for the set of memory cells. The memory system may then set a value for an offset for a threshold voltage of the set of one or more threshold voltages based on the error rate.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Inventors: Li-Te Chang, Murong Lang, Zhenming Zhou, Ting Luo
  • Patent number: 11869584
    Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a plurality of sensing operations respectively corresponding to a plurality of sensing voltages to generate a first digital value and a second digital value of the Flash cell, the second digital value representing at least one candidate threshold voltage of the Flash cell; determining a threshold voltage of the Flash cell according to whether the at least one candidate threshold voltage is high or low; determining soft information of a bit stored in the Flash cell according to the threshold voltage of the Flash cell; and using the soft information to perform soft decoding.
    Type: Grant
    Filed: June 5, 2022
    Date of Patent: January 9, 2024
    Assignee: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
  • Patent number: 11855624
    Abstract: An optical keyswitch includes a keycap, a support mechanism, and a switch module. The support mechanism is disposed below the keycap and configured to support the keycap moving upward and downward, the support mechanism comprising a first frame and a second frame, the first frame having a sliding end. The switch module includes a circuit board, an emitter, and a receiver, the emitter and the receiver are electrically connected to the circuit board, and the emitter emitting an optical signal to the receiver. When the keycap is pressed, the first frame is driven by the keycap to slide substantially parallel to the circuit board and block the optical signal with the sliding end, so the switch module is triggered to generate a triggering signal.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: December 26, 2023
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Yu-Chun Hsieh, Li-Te Chang, Po-Yueh Chou
  • Publication number: 20230395287
    Abstract: An over-current protection device comprises first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler and a titanium-containing inner filler. The polymer matrix has a fluorine-free polyolefin-based polymer. The titanium-containing inner filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing inner filler accounts for 1-9% by volume of the PTC material layer.
    Type: Application
    Filed: January 5, 2023
    Publication date: December 7, 2023
    Inventors: CHEN-NAN LIU, YUNG-HSIEN CHANG, HSIU-CHE YEN, CHENG-YU TUNG, CHIA-YUAN LEE, YU-CHIEH FU, YAO-TE CHANG, FU-HUA CHU
  • Publication number: 20230395288
    Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler, and a titanium-containing dielectric filler. The polymer matrix has a fluoropolymer. The titanium-containing dielectric filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing dielectric filler accounts to for 5-15% by volume of the PTC material layer.
    Type: Application
    Filed: September 28, 2022
    Publication date: December 7, 2023
    Inventors: Hsiu-Che YEN, Yung-Hsien CHANG, Cheng-Yu TUNG, Chen-Nan LIU, Chia-Yuan LEE, Yu-Chieh FU, Yao-Te CHANG, Fu-Hua CHU
  • Publication number: 20230393991
    Abstract: A read command is received by a processing device coupled to a memory device. The read command specified a logical address. The processing device translates the logical address into a physical address of a physical block of the memory device, wherein the physical address specifies a wordline and a memory device die. Responsive to determining that the physical block is partially programmed, the processing device identifies a threshold voltage offset associated with the wordline. The processing device computes a modified threshold voltage by applying the threshold voltage offset to a read level associated with the memory device die. The processing device reads the data from the physical block using the modified threshold voltage.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 7, 2023
    Inventors: Li-Te Chang, Murong Lang, Zhenming Zhou