Patents by Inventor Te-Cheng Lin

Te-Cheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145475
    Abstract: A semiconductor device includes a first transistor and a second transistor. The first transistor is of a first type in a first layer and includes a gate extending in a first direction and a first active region extending in a second direction perpendicular to the first direction. The second transistor is of a second type arranged in a second layer over the first layer and includes the gate and a second active region extending in the second direction. The semiconductor device further includes a first conductive line in a third layer between the first and second layers. The first conductive line electrically connects a first source/drain region of the first active region to a second source/drain region of the second active region. The gate comprises an intermediate portion disposed between the first active region and the second active region, wherein the first conductive line crosses the gate at the intermediate portion.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: SHIH-WEI PENG, TE-HSIN CHIU, WEI-CHENG LIN, JIANN-TYNG TZENG
  • Patent number: 11963295
    Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hung-Hsien Ko, Yi-Cheng Lu, Heng-Yin Chen, Hao-Wei Yu, Te-Hsun Lin
  • Patent number: 11962847
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: April 16, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
  • Publication number: 20240105601
    Abstract: An integrated circuit includes a plurality of first layer deep lines, a plurality of first layer shallow lines, a plurality of second layer deep lines, and a plurality of second layer shallow lines. The integrated circuit also includes a first active device and a second active device coupled between a conducting path that has a low resistivity portion and a low capacitivity portion. The first active device has an output coupled to a first layer deep line that is in the low resistivity portion. The second active device has an input coupled to a first layer shallow line that is in the low capacitivity portion. The low resistivity portion excludes the first layer shallow lines and the second layer shallow lines, and the low capacitivity portion excludes the first layer deep lines and the second layer deep lines.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Wei-An LAI, Te-Hsin CHIU, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG, Chia-Tien WU
  • Patent number: 11943921
    Abstract: Various embodiments of the present application are directed to an IC, and associated forming methods. In some embodiments, the IC comprises a memory region and a logic region integrated in a substrate. A plurality of memory cell structures is disposed on the memory region. Each memory cell structure of the plurality of memory cell structures comprises a control gate electrode disposed over the substrate, a select gate electrode disposed on one side of the control gate electrode, and a spacer between the control gate electrode and the select gate electrode. A contact etch stop layer (CESL) is disposed along an upper surface of the substrate, extending upwardly along and in direct contact with a sidewall surface of the select gate electrode within the memory region. A lower inter-layer dielectric layer is disposed on the CESL between the plurality of memory cell structures within the memory region.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Han Lin, Te-Hsin Chiu, Wei Cheng Wu
  • Patent number: 11935830
    Abstract: An integrated circuit includes multiple backside conductive layers disposed over a backside of a substrate. The multiple backside conductive layers each includes conductive segments. The conductive segments in at least one of the backside conductive layers are configured to transmit one or more power signals. The conductive segments of the multiple backside conductive layers cover select areas of the backside of the substrate, thereby leaving other areas of the backside of the substrate exposed.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Hsin Chiu, Shih-Wei Peng, Wei-Cheng Lin, Jiann-Tyng Tzeng, Jiun-Wei Lu
  • Patent number: 11926699
    Abstract: Provided is an aliphatic polyester composition. The aliphatic polyester composition comprises a polybutylene succinate, wherein the proton nuclear magnetic resonance of the aliphatic polyester composition has a first characteristic peak and a second characteristic peak. The first characteristic peak is located between 3.84 ppm and 4.32 ppm, and the second characteristic peak is located between 5.65 ppm and 5.85 ppm. The integral value of the first characteristic peak is set to be 100 and the integral value of the second characteristic peak is less than 0.10. By controlling the integral value of the second characteristic peak in H1-NMR of the aliphatic polyester composition, the aliphatic polyester composition has good appearance and low concentration of carboxylic acid end group and thereby the product value thereof is increased.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: March 12, 2024
    Assignee: CHANG CHUN PLASTICS CO., LTD.
    Inventors: Jie-Cheng Li, Te-Shun Lin
  • Patent number: 11923369
    Abstract: An integrated circuit includes a set of power rails on a back-side of a substrate, a first flip-flop, a second flip-flop and a third flip-flop. The set of power rails extend in a first direction. The first flip-flop includes a first set of conductive structures extending in the first direction. The second flip-flop abuts the first flip-flop at a first boundary, and includes a second set of conductive structures extending in the first direction. The third flip-flop abuts the second flip-flop at a second boundary, and includes a third set of conductive structures extending in the first direction. The first, second and third flip-flop are on a first metal layer and are on a front-side of the substrate opposite from the back-side. The second set of conductive structures are offset from the first boundary and the second boundary in a second direction.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Hsin Chiu, Wei-Cheng Lin, Wei-An Lai, Jiann-Tyng Tzeng
  • Patent number: 11923427
    Abstract: A semiconductor device includes a semiconductor substrate, a control gate, a select gate, a charge trapping structure, and a dielectric structure. The semiconductor substrate has a drain region, a source region, and a channel region between the drain region and the source region. The control gate is over the channel region of the semiconductor substrate. The select gate is over the channel region of the semiconductor substrate and separated from the control gate. The charge trapping structure is between the control gate and the semiconductor substrate. The dielectric structure is between the select gate and the semiconductor substrate. The dielectric structure has a first part and a second part, the first part is between the charge trapping structure and the second part, and the second part is thicker than the first part.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Wei-Cheng Wu, Te-Hsin Chiu
  • Patent number: 11911951
    Abstract: A matte film for hot pressing and a manufacturing method thereof are provided. The manufacturing method includes steps of forming at least one polyester composition into an unstretched polyester thick film and stretching the unstretched polyester thick film in a machine direction (MD) and a transverse direction (TD). The polyester composition includes 81% to 97.9497% by weight of a polyester resin, 0.02% to 2% by weight of an antioxidative ingredient, 0.0003% to 1% by weight of a nucleating agent, 0.01% to 2% by weight of a flow aid, 0.01% to 2% by weight of a polyester modifier, 0.01% to 2% by weight of an inorganic filler, and 2% to 10% by weight of silica particles. The polyester resin has an intrinsic viscosity between 0.60 dl/g and 0.80 dl/g.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 27, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Wen-Jui Cheng, Chia-Yen Hsiao, Chien-Chih Lin
  • Patent number: 11916070
    Abstract: Disclosed are semiconductor devices including a substrate, a first transistor formed over a first portion of the substrate, wherein the first transistor comprises a first nanosheet stack including N nanosheets and a second transistor over a second portion of the substrate, wherein the second transistor comprises a second nanosheet stack including M nanosheets, wherein N is different from M in which the first and second nanosheet stacks are formed on first and second substrate regions that are vertically offset from one another.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Hsin Chiu, Kam-Tou Sio, Shang-Wei Fang, Wei-Cheng Lin, Jiann-Tyng Tzeng
  • Patent number: 8102600
    Abstract: A stacked disk-shaped optical lens array, a stacked disk-shaped lens module array and a method of manufacturing the same are revealed. The stacked disk-shaped optical lens array is produced by stacked disk-shaped optical lens modules whose optical axis is aligned. The stacked disk-shaped lens module array is produced by a stacked disk-shaped optical lens array whose optical axis is aligned by an alignment fixture, stacked and assembled with required optical element arrays. In the stacked disk-shaped lens module array produced by this method, the lens optical axis is aligned precisely. Moreover, the manufacturing process is simplified and the cost is reduced.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: January 24, 2012
    Assignee: E-Pin Optical Industry Co., Ltd.
    Inventors: San-Woei Shyu, Huang-Chang Chen, Chih-Peng Wang, Te-Cheng Lin
  • Publication number: 20110194019
    Abstract: A single-piece optical imaging lens and an array thereof are revealed. The optical imaging lens includes a lens and an image sensor arranged at an image-side surface of the lens. The lens includes an object-side surface, an image-side surface, an optical area, and a non-optical area. The optical imaging lens satisfies the following conditions: BFL/TTL=0.55˜0.81, OH/OD=1.0˜3.6. TTL is total length from the object-side surface of the lens on the optical axis to the image sensor. BFL is back focal length of the imaging lens. OD is the distance between an object on the optical axis and the object-side surface of the lens. OH is the largest height of an object vertical to the optical axis of OD. The single-piece optical imaging lens array is used to produce a plurality of single-piece optical imaging lenses by cutting.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 11, 2011
    Inventors: San-Woei SHYU, Huang-Chang Chen, Chih-Peng Wang, Te-Cheng Lin, Bo-Yuan Shih
  • Patent number: 7965445
    Abstract: A high SAG optical lens and method for fast molding the same is disclosed, in which an optical lens is a single optical lens or an optical lens array formed by placing optical material between an upper mold and a lower mold for molding by heating and pressing processes; a formed rim is molded at the joint of the optical surface and the lens flange simultaneously. Therefore, it is convenient to fabricate the optical lens with high SAG and can eliminate the ghost phenomena effect occurring at the edge of the optical surface and the lens flange. Furthermore, since the feature of squeezing the melted optical material by the formed rim during the molding process, fast molding process can be successfully achieved.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: June 21, 2011
    Assignee: E-Pin Optical Industry Co., Ltd.
    Inventors: Huang-Chang Chen, Chih-Peng Wang, Te-Cheng Lin, San-Woei Shyu
  • Patent number: 7944633
    Abstract: A lens holder for alignment of a stacked lens module and a manufacturing method thereof are revealed. A stacked lens submodule disposed with at least one first alignment fixture is used as a molding insert to be set into a mold arranged with a second alignment fixture where the first alignment fixture connects with the second alignment fixture correspondingly. Then by injection or press molding of the embedded molding insert, a lens module with the lens holder for alignment is formed. Thereby the conventional manufacturing method of the lens molder is improved, the processes are simplified and the yield rate is increased. Moreover, the molded lens module is packed into the lens more easily so that it is suitable to be applied to camera lenses, small lenses and mobile phone lenses.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: May 17, 2011
    Assignee: E-Pin Optical Industry Co., Ltd.
    Inventors: San-Woei Shyu, Huang-Chang Chen, Chih-Peng Wang, Te-Cheng Lin
  • Patent number: 7944630
    Abstract: A lens holder of a stacked lens module and a manufacturing method thereof are revealed. A stacked lens submodule is used as a molded molding insert to be set into a mold cavity. The molding insert is aligned in the alignment fixture and the clamp of the mold by injection molding or press molding. After molding process, a lens module included the stacked lens submodule as well as the lens holder is formed. Thereby the manufacturing method of conventional lens assemblies or lens modules is improved. Moreover, the processes are simplified and the yield rate is increased. Furthermore, the molded lens module is packed into the lens more easily so that it is suitable to be applied to camera lenses, small lenses and mobile phone lenses.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: May 17, 2011
    Assignee: E-Pin Optical Industry Co., Ltd.
    Inventors: San-Woei Shyu, Huang-Chang Chen, Chih-Peng Wang, Te-Cheng Lin
  • Publication number: 20110075264
    Abstract: A high SAG optical lens and method for fast molding the same is disclosed, in which an optical lens is a single optical lens or an optical lens array formed by placing optical material between an upper mold and a lower mold for molding by heating and pressing processes; a formed rim is molded at the joint of the optical surface and the lens flange simultaneously. Therefore, it is convenient to fabricate the optical lens with high SAG and can eliminate the ghost phenomena effect occurring at the edge of the optical surface and the lens flange. Furthermore, since the feature of squeezing the melted optical material by the formed rim during the molding process, fast molding process can be successfully achieved.
    Type: Application
    Filed: March 23, 2010
    Publication date: March 31, 2011
    Applicant: E-PIN OPTICAL INDUSTRY CO., LTD.
    Inventors: HUANG-CHANG CHEN, CHIH-PENG WANG, TE-CHENG LIN, SAN-WOEI SHYU
  • Publication number: 20110063730
    Abstract: A disk-shaped optical lens array produced by resin injection-compression molding and a manufacturing method thereof are revealed. The disk-shaped optical lens array has at least one alignment fixture a first surface and a second optical surface. The optical surfaces respectively including a plurality of optical zones corresponding to each other so as to form a plurality of optical lens elements arranged in an array and a plurality of single optical elements is produced after cutting. At least one disk-shaped optical lens array and other optical lens element/or two disk-shaped optical lens arrays are aligned with an optical axis of an optical lens element by the alignment fixture to form a stacked disk-shaped optical lens array. Therefore the manufacturing processes of the optical lens arrays are simplified with improved precision and reduced cost.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 17, 2011
    Inventors: San-Woei SHYU, Huang-Chang Chen, Chih-Peng Wang, Te-Cheng Lin
  • Publication number: 20110063723
    Abstract: A stacked disk-shaped optical lens array, a stacked disk-shaped lens module array and a method of manufacturing the same are revealed. The stacked disk-shaped optical lens array is produced by stacked disk-shaped optical lens modules whose optical axis is aligned. The stacked disk-shaped lens module array is produced by a stacked disk-shaped optical lens array whose optical axis is aligned by an alignment fixture, stacked and assembled with required optical element arrays. In the stacked disk-shaped lens module array produced by this method, the lens optical axis is aligned precisely. Moreover, the manufacturing process is simplified and the cost is reduced.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 17, 2011
    Inventors: San-Woei SHYU, Huang-Chang CHEN, Chih-Peng Wang, Te-Cheng LIN
  • Publication number: 20110063722
    Abstract: A stacked disk-shaped optical lens array, a stacked lens module and a method of manufacturing the same are revealed. The stacked disk-shaped optical lens array is produced by at least tow disk-shaped optical lens arrays whose optical axes are aligned. After the optical axes of the stacked disk-shaped optical lens array being aligned by alignment fixtures, the stacked disk-shaped optical lens array is cut to produce a single stacked optical lens element. The optical lens element and optical elements required are mounted into a lens holder to form the stacked lens module. The stacked lens module produced by the method has optical lens elements whose axes are aligned precisely. The processes for manufacturing lens modules are simplified and the cost is reduced.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 17, 2011
    Inventors: San- Woei SHYU, Huang- Chang Chen, Chih- Peng Wang, Te- Cheng Lin