Patents by Inventor Te-Hsin Chen

Te-Hsin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11527048
    Abstract: A method for simulating setting of a projector by augmented reality (AR) includes: activating an AR application on a terminal device; performing, through an image capturing element of the terminal device, dimension measurement on a space where a projector is to be disposed to obtain a space dimension; selecting a placement reference point of the projector and a display reference point of a projection picture; generating, according to the space dimension, the placement reference point, and the display reference point, a simulation picture on the terminal device when the projector projects the projection picture in the space; adjusting the projection picture and/or the projector in the simulation picture to generate an adjusted simulation picture; and comparing the adjusted simulation picture with projector parameter data of projector models to recommend at least one projector model to a user for selection or inputting, by the user, a custom projector model.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: December 13, 2022
    Assignee: Optoma Corporation
    Inventors: Wen-Tai Wang, Chi-Lin Lee, Te-Hsin Chen, Ekrem Tapan
  • Publication number: 20210407204
    Abstract: A method for simulating setting of a projector by augmented reality (AR) includes: activating an AR application on a terminal device; performing, through an image capturing element of the terminal device, dimension measurement on a space where a projector is to be disposed to obtain a space dimension; selecting a placement reference point of the projector and a display reference point of a projection picture; generating, according to the space dimension, the placement reference point, and the display reference point, a simulation picture on the terminal device when the projector projects the projection picture in the space; adjusting the projection picture and/or the projector in the simulation picture to generate an adjusted simulation picture; and comparing the adjusted simulation picture with projector parameter data of projector models to recommend at least one projector model to a user for selection or inputting, by the user, a custom projector model.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 30, 2021
    Applicant: Optoma Corporation
    Inventors: Wen-Tai Wang, Chi-Lin Lee, Te-Hsin Chen, EKREM TAPAN
  • Patent number: 8428911
    Abstract: A testing method for carrying out an accuracy testing operation on a system time signal of a computer device under test includes the following steps. First, first and second clock cycle parameters of an operation clock signal (CPU clock) are respectively recorded in response to first and second triggering edges triggered by an external reference time signal. Next, a reference clock cycle parameter is determined according to the first and second clock cycle parameters. Then, third and fourth clock cycle parameters of the operation clock signal are respectively recorded in response to third and fourth triggering edges triggered by the system time signal. Next, a to-be-measured clock cycle parameter is obtained according to the third and fourth clock cycle parameters. Thereafter, error information of the system time signal is obtained according to the to-be-measured clock cycle parameter and the reference clock cycle parameter.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: April 23, 2013
    Assignee: Quanta Computer Inc.
    Inventors: Te-Hsin Chen, Shih-Pen Chen
  • Publication number: 20110231154
    Abstract: A testing method for carrying out an accuracy testing operation on a system time signal of a computer device under test includes the following steps. First, first and second clock cycle parameters of an operation clock signal (CPU clock) are respectively recorded in response to first and second triggering edges triggered by an external reference time signal. Next, a reference clock cycle parameter is determined according to the first and second clock cycle parameters. Then, third and fourth clock cycle parameters of the operation clock signal are respectively recorded in response to third and fourth triggering edges triggered by the system time signal. Next, a to-be-measured clock cycle parameter is obtained according to the third and fourth clock cycle parameters. Thereafter, error information of the system time signal is obtained according to the to-be-measured clock cycle parameter and the reference clock cycle parameter.
    Type: Application
    Filed: December 10, 2010
    Publication date: September 22, 2011
    Applicant: Quanta Computer Inc.
    Inventors: Te-Hsin CHEN, Shih-Pen Chen
  • Publication number: 20110087452
    Abstract: A test device for testing a system, which has first interface circuit, second interface circuit, and a power switch, comprises a power supply, status detector, and a controller. The power supply includes a supplying unit and a switch controller. The supplying unit provides a test power signal according to a wall wart signal. The switch controller enables the power switch to power the system with the test power signal in response to a control signal. The system boots according to operation system data provided via first interface circuit in response to the test power signal. The status detector generates a status detection signal indicating whether the system boots up successfully in response to an operation signal on the second interface circuit. The controller provides the control signal and processes the status detection signal.
    Type: Application
    Filed: April 26, 2010
    Publication date: April 14, 2011
    Applicant: Quanta Computer Inc.
    Inventors: Shih-Wai Huang, Te-Hsin Chen, Chih-Hua Ho, Ming-Ying Yen