Patents by Inventor Te-Hsun Pang

Te-Hsun Pang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180166409
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Application
    Filed: January 22, 2018
    Publication date: June 14, 2018
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Patent number: 9875979
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: January 23, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Publication number: 20170141059
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 18, 2017
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Publication number: 20020066884
    Abstract: An etching gas having a good chemical property for silicon etch back is made by mixing a SF6 gas with a Cl2 gas. With addition of an inert gas, good chamber conditions are maintained during silicon etch back, and the etching selectivity for silicon to an etching stop layer is improved.
    Type: Application
    Filed: September 10, 1999
    Publication date: June 6, 2002
    Inventors: NIEN-YU TSAI, TE-HSUN PANG, RAY LEE, MU-TSUN TING
  • Patent number: 6379491
    Abstract: An apparatus is provided for treating a wafer under fabrication with an erosive plasma, in a contamination controlled environment. The apparatus includes a chamber for containing the wafer to be treated by the plasma, and for isolating the wafer from contaminants external to the chamber during treatment. The chamber also includes one or more plasma erosion resistive screws. Each screw has a shaft secured within the chamber so that the shaft is unexposed to the plasma, and a raised head which is integral with, and made of the same material as, the shaft. The head has a continuous, surface shape with a reduced number of edges so as to reduce the accumulation of charge thereon, thereby resisting erosion by the plasma.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: April 30, 2002
    Assignees: ProMOS Technologies, Inc., Mosel Vitelic, Inc., Siemens AG
    Inventors: Ray C. Lee, Te-Hsun Pang, Tonny Shu, Birdson Lee