Patents by Inventor Te Hua Lin

Te Hua Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6653224
    Abstract: Methods for fabricating semiconductor structures having LowK dielectric properties are provided. In one example, a copper dual damascene structure is fabricated in a LowK dielectric insulator including forming a capping film over the insulator before features are defined therein. After the copper is formed in the features, the copper overburden is removed using ultra-gentle CMP, and then the barrier is removed using a dry etch process. Following barrier removal, a second etch is performed to thin the capping film. The thinning is configured to reduce the thickness of the capping film without removal, and thereby reducing the K-value of the LowK dielectric structure.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: November 25, 2003
    Assignee: Lam Research Corporation
    Inventors: Yehiel Gotkis, Rodney Kistler, Leonid Romm, Te Hua Lin
  • Patent number: 6495470
    Abstract: A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventors: S. M. Reza Sadjadi, Mansour Moinpour, Te Hua Lin, Farhad K. Moghadam
  • Patent number: 5883436
    Abstract: A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: March 16, 1999
    Assignee: Intel Corporation
    Inventors: S. M. Reza Sadjadi, Mansour Moinpour, Te Hua Lin, Farhad K. Moghadam