Abstract: A flip-chip package includes a substrate having a bond pad in a die-mounting area of the substrate. A DRAM die is mounted on the die-mounting area of the substrate in a flip chip fashion. The DRAM die includes an input/output (I/O) pad on its active surface and the I/O pad is electrically coupled to the t bond pad through a connecting element. The bond pad has a diameter that is smaller than a diameter of the I/O pad. A SoC die is mounted on the substrate in a flip chip fashion. The DRAM die and the SoC die are mounted on the substrate in a side-by-side manner.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A semiconductor package includes a package substrate, an interposer on and electrically connected to the package substrate, a central logic die disposed on and electrically connected to the interposer, peripheral function dies disposed on and electrically connected to the interposer and located in proximity to the central logic die, and at least one dummy die disposed between the central logic die and the peripheral function dies so as to form a rectangular shaped die arrangement. The at least one dummy die is disposed at a corner position of the rectangular shaped die arrangement.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A coreless substrate package includes a coreless substrate; a package device mounted on a coreless substrate; an underfill material filling into a space between the package device and the coreless substrate; a stiffener ring disposed on a top surface of the coreless substrate along perimeter of the coreless substrate; and a gap fill material disposed in a gap between the stiffener ring and the package device.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A thin film solar cell module of see-through type having cells connected in series and disposed on an opaque substrate with holes is provided. The thin film solar cell module includes a first electrode, a second electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode. The first electrode is disposed on the opaque substrate and is composed of a first comb electrode and block-like first electrodes. The second electrode is disposed above the first electrode and is composed of a second comb electrode and block-like second electrodes. A portion of the block-like first electrodes, a portion of the opaque substrate, and the holes are exposed between the second comb electrode and the block-like second electrodes. The second comb electrode and the first comb electrode are disposed symmetrically, and the block-like first electrodes and the block-like second electrodes are disposed by parallel displacement.

Abstract: The prevent disclosure discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is possible.

Abstract: A thin film solar cell module of see-through type having cells connected in series and disposed on an opaque substrate with holes is provided. The thin film solar cell module includes a first electrode, a second electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode. The first electrode is disposed on the opaque substrate and is composed of a first comb electrode and block-like first electrodes. The second electrode is disposed above the first electrode and is composed of a second comb electrode and block-like second electrodes. A portion of the block-like first electrodes, a portion of the opaque substrate, and the holes are exposed between the second comb electrode and the block-like second electrodes. The second comb electrode and the first comb electrode are disposed symmetrically, and the block-like first electrodes and the block-like second electrodes are disposed by parallel displacement.

Abstract: The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.

Abstract: A method of fabricating a clamping device for a flexible substrate is provided. A carrier board is provided. A plurality of holes is formed in the carrier board. A fixed positioning assembly and a movable positioning assembly are respectively embedded in the plurality of holes.

Abstract: A thin film solar cell module of see-through type and method of fabricating the same is provided. The method includes forming scribe lines in two directions in a first electrode material layer disposed on an opaque substrate so as to avoid short circuit caused by a high-temperature laser scribing process and reduction of the process yield. Moreover, the thin film solar cell module of see-through type has holes through the opaque substrate so that the cell module increases the transmittance of the cells.

Abstract: A method of fabricating a clamping device for a flexible substrate is provided. A carrier board having a first positing holes and a plurality of second position holes is provided, wherein the first and the second position holes correspond in position to a plurality of through holes on the flexible substrate. A portion of the carrier board material close to the second position holes is removed to form a hole body and a plurality of curved extending arms connected to the hole body and the carrier board. A first dowel pin and a plurality of second dowel pins are provided for inserting into the first positioning hole and the second positioning holes, respectively.

Abstract: A bifacial thin film solar cell and method for fabricating the same are provided. The solar cell has a first and a second transparent substrates, a first and a second solar cell modules, and an insulating layer. The first solar cell module is formed on the first transparent substrate, and has a metal layer as one of the electrodes of the first solar cell module and as a light reflection layer. The insulating layer is formed on the metal layer of the first solar cell module. The second solar cell module is formed between the insulating layer and the second transparent substrate.

Abstract: The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.

Abstract: A method of fabricating a clamping device for a flexible substrate is provided. A carrier board is provided. A plurality of holes is formed in the carrier board. A fixed positioning assembly and a movable positioning assembly are respectively embedded in the plurality of holes.

Abstract: A method of fabricating a clamping device for a flexible substrate is provided. A carrier board having a first positing holes and a plurality of second position holes is provided, wherein the first and the second position holes correspond in position to a plurality of through holes on the flexible substrate. A portion of the carrier board material close to the second position holes is removed to form a hole body and a plurality of curved extending arms connected to the hole body and the carrier board. A first dowel pin and a plurality of second dowel pins are provided for inserting into the first positioning hole and the second positioning holes, respectively.