Patents by Inventor Teck Tiong Tan
Teck Tiong Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220093479Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: ApplicationFiled: December 7, 2021Publication date: March 24, 2022Applicant: JCET Semiconductor (Shaoxing) Co., Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Patent number: 11227809Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: GrantFiled: March 13, 2017Date of Patent: January 18, 2022Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Publication number: 20170186660Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: ApplicationFiled: March 13, 2017Publication date: June 29, 2017Applicant: STATS ChipPAC Pte. Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Patent number: 9627338Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: GrantFiled: February 21, 2014Date of Patent: April 18, 2017Assignee: STATS ChipPAC Pte. Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Publication number: 20140252641Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: ApplicationFiled: February 21, 2014Publication date: September 11, 2014Applicant: STATS ChipPAC, Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Publication number: 20080150107Abstract: A method for forming semiconductor packages is disclosed. The method involves providing a support substrate and forming at least one conductive layer thereon. The method also includes coupling the at least one conductive layer to a support face of a film substrate for securing the at least one conductive layer to the support face and removing the support substrate from the at least one conductive layer. The at least one interconnector is adhered to the film substrate for forming an interposer. The method further involves bonding a integrated circuit chip to the at least one conductive layer of the interposer and disposing a compound over the support face to thereby encapsulate the integrated circuit chip and the least one conductive layer for forming an encapsulated package therefrom. Portions of the at least one conductive layer is then exposed by removing the film substrate from the encapsulated package.Type: ApplicationFiled: March 6, 2008Publication date: June 26, 2008Applicant: ADVANPACK SOLUTION PTES LTDInventors: Teck Tiong TAN, Hwee Seng Jimmy CHEW, Kok Yeow Eddy LIM, Abd. Razak Bin CHICHIK, Kee Kwang LAU, Chuan Wei WONG
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Publication number: 20070284420Abstract: A method for coupling a semiconductor substrate to a receiving substrate is disclosed. The method comprising the step of providing a receiving substrate having at least one receiving pad formed thereon, the at least one receiving pad having a face and a portion substantially extending from the periphery of the face to the receiving substrate. The method also involves the step of providing a semiconductor substrate having at least one bonding pad formed thereon and at least one pillar extending from the at least one bonding pad towards the at least one receiving pad, the at least one pillar having a reflowable and a non-reflowable portion. The method further involves the step of positioning the semiconductor substrate over the receiving substrate for facing the at least one receiving pad towards the at least one pillar, and reflowing the reflowable portion substantially over the face and substantially onto the portion.Type: ApplicationFiled: June 13, 2006Publication date: December 13, 2007Applicant: ADVANPACK SOLUTIONS PTE LTDInventors: Teck Tiong Tan, Hwee Seng Jimmy Chew
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Patent number: 7294827Abstract: An electronic module adapted to sense light and configured to minimize the entry of stray light into the module. The module includes a housing having an opening through which light enters the housing, a first substrate coupled to the housing, a second substrate on the first substrate opposite the housing, and a chip on the second substrate. The first substrate defines a window aligned with the housing so that light traveling through the housing also passes through window. The second substrate defines an opening aligned with the window, and the chip is located over the opening in the second substrate so that a light-sensing element on the chip senses light passing through the opening. The module is equipped with features that prevent light from entering the module through the second substrate, the first substrate, and between the chip and second substrate.Type: GrantFiled: September 21, 2004Date of Patent: November 13, 2007Assignee: Delphi Technologies, Inc.Inventors: Teck Tiong Tan, Binghua Pan, Jeffrey H. Burns, John R. Troxell