Abstract: A document distribution terminal is organized with two supervisory processing units, one to control the data entry and data printing and the other to control the terminal. Each of these processing units only performs control functions. All of the data processing is performed by various specialized devices preparing the document data for transmission or for printing. Further, the terminal is organized with two interfaces and an adapter coupling the two interfaces. The terminal-controlling processing unit supervises one interface that interconnects all of the specialized devices. The other processing unit, that controls the data entry and data printing devices, supervises the second interface. Once the supervisory processing units have set up a job in the terminal, the data transfer across the two interfaces is substantially under the control of logic in the adapter.

Abstract: A peripheral system has one or more buffered control units connected to a plurality of peripheral devices. Operation times of the devices are marked by the buffer and controls which overlap device operations, queue device operations in a priority set of queues, and prioritize peripheral system operations. Plural specialized interconnections between each control unit and the devices include a preparatory connection for transfer of preparatory commands to devices, a tag or control connection for device selection, deselection and control and a data-command connection for signal transfers between a selecting control unit and a selected peripheral device.

Abstract: A buffer storage apparatus has two buffers alternating between receiving and supplying data signals. The buffer functions are alternated between the buffers when one of the buffers is empty and another one of the buffers has received a predetermined number of signals even though that data-receiving buffer is not yet full. With data transferred in blocks of data bytes, switching between buffers occurs on the predetermined address boundaries of the data blocks. Alternation of functions between the buffers can occur at any one of a plurality of address boundaries within the data-receiving one of the buffers. By using a plurality of such buffer storage apparatus to connect individual data burst units to a plural-port high-speed common unit, each data burst unit has a high speed buffered access to the high speed common unit.