Abstract: Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock signal is powered by at least one switching-type voltage regulator. When the functional block is about to require an increased level of power, the associated clock is provided to drive the at least one regulator switches overriding their normal drive signal, which has a lower frequency. Thus, the switches are driven at a higher frequency sufficiently prior to (e.g., just ahead of) the load change to reduce the amount of droop that would otherwise occur.

Abstract: Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock signal is powered by at least one switching-type voltage regulator. When the functional block is about to require an increased level of power, the associated clock is provided to drive the at least one regulator switches overriding their normal drive signal, which has a lower frequency. Thus, the switches are driven at a higher frequency sufficiently prior to (e.g., just ahead of) the load change to reduce the amount of droop that would otherwise occur.

Abstract: A “digital data stream,” “binary sequence” or word can be generated by a logic circuit such as a processor and the sequence can be converted to a series of pulses such that the content of the sequence can be utilized to accurately control/drive a plurality of power transistors. Accordingly, a regulated voltage can be provided through such a data type output of a processor. Thus, a standard processor that executes data processing operations can provide a low level logic signal as a serial digital transmission, possibly a four bit word, and control a power supply without significant modification. To achieve such a conversion the processor can be capacitively coupled to a voltage level shifter and a delay module to provide a plurality of power transistor drive signals. The converter can be wholly integrated onto a processor or motherboard to eliminate devices and stand alone assemblies that are commonly required in data processing systems.

Abstract: Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock signal is powered by at least one switching-type voltage regulator. When the functional block is about to require an increased level of power, the associated clock is provided to drive the at least one regulator switches overriding their normal drive signal, which has a lower frequency. Thus, the switches are driven at a higher frequency sufficiently prior to (e.g., just ahead of) the load change to reduce the amount of droop that would otherwise occur.

Abstract: A “digital data stream,” “binary sequence” or word can be generated by a logic circuit such as a processor and the sequence can be converted to a series of pulses such that the content of the sequence can be utilized to accurately control/drive a plurality of power transistors. Accordingly, a regulated voltage can be provided through such a data type output of a processor. Thus, a standard processor that executes data processing operations can provide a low level logic signal as a serial digital transmission, possibly a four bit word, and control a power supply without significant modification. To achieve such a conversion the processor can be capacitively coupled to a voltage level shifter and a delay module to provide a plurality of power transistor drive signals. The converter can be wholly integrated onto a processor or motherboard to eliminate devices and stand alone assemblies that are commonly required in data processing systems.