Patents by Inventor Ted E. Williams
Ted E. Williams has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10319065Abstract: A recommend operating frequency for a GPU is determine by an operating system. Timing information is used to estimate a time to complete the rendering of the current frame. If the estimate of the time to complete the rendering of the current frame is greater than the time left before the deadline, the operating frequency of the GPU is rapidly increased mid-frame. The new operating frequency is selected so that the rendering of the current frame can be expected to complete before the deadline arrives. Thus, when the rendering workload is low for a frame, the GPU is operated at a lower frequency thereby saving power. When the workload is high for a frame (even if the workload was lower for the previous frame), the GPU is operated at a higher frequency thereby ensuring a quality user experience.Type: GrantFiled: April 13, 2017Date of Patent: June 11, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Hee jun Park, Ted E. Williams
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Publication number: 20180300838Abstract: A recommend operating frequency for a GPU is determine by an operating system. Timing information is used to estimate a time to complete the rendering of the current frame. If the estimate of the time to complete the rendering of the current frame is greater than the time left before the deadline, the operating frequency of the GPU is rapidly increased mid-frame. The new operating frequency is selected so that the rendering of the current frame can be expected to complete before the deadline arrives. Thus, when the rendering workload is low for a frame, the GPU is operated at a lower frequency thereby saving power. When the workload is high for a frame (even if the workload was lower for the previous frame), the GPU is operated at a higher frequency thereby ensuring a quality user experience.Type: ApplicationFiled: April 13, 2017Publication date: October 18, 2018Inventors: Hee jun Park, Ted E. Williams
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Patent number: 8078703Abstract: An efficient software download to a configurable communication device is disclosed herein. The method of efficiently downloading software begins with a step of receiving a request to configure a communication device to run a communication application. The communication device being configured has a plurality of function blocks with a fixed portion of hardware and a flexible portion of hardware, wherein the same plurality of function blocks is capable of operating a plurality of communication applications. In a next step, the capability of the fixed portion and the flexible portion of hardware of the communication device is evaluated for a capability of implementing the communication application. Next, configuration information only for the flexible portion of hardware of the communication device is transmitted to the communication device to enable it to operate the communication application.Type: GrantFiled: October 20, 2010Date of Patent: December 13, 2011Assignee: Infineon Technologies AGInventors: John D. Ralston, Ravi Subramanian, Song Chen, Ted E. Williams
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Publication number: 20110035475Abstract: An efficient software download to a configurable communication device is disclosed herein. The method of efficiently downloading software begins with a step of receiving a request to configure a communication device to run a communication application. The communication device being configured has a plurality of function blocks with a fixed portion of hardware and a flexible portion of hardware, wherein the same plurality of function blocks is capable of operating a plurality of communication applications. In a next step, the capability of the fixed portion and the flexible portion of hardware of the communication device is evaluated for a capability of implementing the communication application. Next, configuration information only for the flexible portion of hardware of the communication device is transmitted to the communication device to enable it to operate the communication application.Type: ApplicationFiled: October 20, 2010Publication date: February 10, 2011Inventors: John D. RALSTON, Ravi Subramanian, Song Chen, Ted E. Williams
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Patent number: 7870233Abstract: An efficient software download to a configurable communication device is disclosed herein. The method of efficiently downloading software begins with a step of receiving a request to configure a communication device to run a communication application. The communication device being configured has a plurality of function blocks with a fixed portion of hardware and a flexible portion of hardware, wherein the same plurality of function blocks is capable of operating a plurality of communication applications. In a next step, the capability of the fixed portion and the flexible portion of hardware of the communication device is evaluated for a capability of implementing the communication application. Next, configuration information only for the flexible portion of hardware of the communication device is transmitted to the communication device to enable it to operate the communication application.Type: GrantFiled: February 15, 2007Date of Patent: January 11, 2011Assignee: Infineon Technologies AGInventors: John D. Ralston, Ravi Subramanian, Song Chen, Ted E. Williams
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Patent number: 7243323Abstract: Method of developing a model of a circuit design including the steps of generating four different path-tracing runs, creating four arcs from the four different path-tracing runs, and combining the four arcs into two separate models. Also, a method of adjusting timing of a clock signal provided to a first block and a second block where data signals travel via a first path from the first block to the second block and data signals travel via a second path from the second block to the first block and the time for the data signals to travel the first path is greater than the time for the data signals to travel the second path. The clock signal provided to the second block relative to the clock signal provided to the first block is delayed by an amount that is a function of the difference between the time for the data signals to travel the first path and the time for the data signals to travel the second path.Type: GrantFiled: August 29, 2002Date of Patent: July 10, 2007Assignee: Infineon Technologies AGInventors: Ted E. Williams, Jonathan Ferro, DeForest Tovey, Louis Tseng
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Patent number: 7188159Abstract: An efficient software download to a configurable communication device is disclosed herein. The method of efficiently downloading software begins with a step of receiving a request to configure a communication device to run a communication application. The communication device being configured has a plurality of function blocks with a fixed portion of hardware and a flexible portion of hardware, wherein the same plurality of function blocks is capable of operating a plurality of communication applications. In a next step, the capability of the fixed portion and the flexible portion of hardware of the communication device is evaluated for a capability of implementing the communication application. Next, configuration information only for the flexible portion of hardware of the communication device is transmitted to the communication device to enable it to operate the communication application.Type: GrantFiled: August 9, 2001Date of Patent: March 6, 2007Assignee: Infineon Technologies AGInventors: John D. Ralston, Ravi Subramanian, Song Chen, Ted E. Williams
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Publication number: 20030051222Abstract: Methods are disclosed for improving the design of integrated circuits.Type: ApplicationFiled: August 29, 2002Publication date: March 13, 2003Inventors: Ted E. Williams, Jonathan Ferro, DeForest Tovey, Louis Tseng
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Publication number: 20020045441Abstract: An efficient software download to a configurable communication device is disclosed herein. The method of efficiently downloading software begins with a step of receiving a request to configure a communication device to run a communication application. The communication device being configured has a plurality of function blocks with a fixed portion of hardware and a flexible portion of hardware, wherein the same plurality of function blocks is capable of operating a plurality of communication applications. In a next step, the capability of the fixed portion and the flexible portion of hardware of the communication device is evaluated for a capability of implementing the communication application. Next, configuration information only for the flexible portion of hardware of the communication device is transmitted to the communication device to enable it to operate the communication application.Type: ApplicationFiled: August 9, 2001Publication date: April 18, 2002Inventors: John D. Ralston, Ravi Subramanian, Song Chen, Ted E. Williams
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Patent number: 5671151Abstract: Asynchronous combinatorial logic apparatus and method are provided that propagate data through a logic array at the speed of a raw combinational logic array and generate a functional output signal. The apparatus and method provide a minimum expected value of data propagation delay. In one embodiment, a particular data path is identified that has higher than average usage probability based on knowledge of the probabalistic distribution of data values, and the particular data path connecting devices located in the identified higher usage path are modified, such as by shortening the path, so that the path that is known to have a higher usage is made faster.Type: GrantFiled: November 14, 1994Date of Patent: September 23, 1997Assignee: Hal Computer Systems, Inc.Inventor: Ted E. Williams
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Patent number: 5513132Abstract: A novel third phase of CMOS domino logic is identified and used in the logic system of the present invention to store data. The use of this third phase in addition to the normally used precharge and logic evaluation phases, provides a logic structure of cascaded domino logic gates which are pipelined without intervening latches for memory storage. The memory storage function of the conventional latches being provided by the third logic phase. The novel approach requires that the functional inputs to this system have strictly monotonic transitions during the logic evaluation phase, and requires that the precharge signal must be active during only the precharge phase. Embodiments of the pipelined system according to the invention, are structured so that the output of the pipeline are fed back to the input of the pipeline to form an iterative structure. Such a feedback pipeline is viewed as a "loop" or "ring" of logic. The logic ring circulates data until the entire computation is complete.Type: GrantFiled: April 5, 1993Date of Patent: April 30, 1996Assignee: Hal Computer Systems, Inc.Inventor: Ted E. Williams
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Patent number: 5121003Abstract: CMOS domino logic is normally used only in two phases: precharge and logic evaluation. The invention uses a third phase to store data, which allows domino logic gates to be cascaded and pipelined without intervening latches. The inputs to this system must have strictly monotonic transitions during the logic evaluation phase and the precharge signal must be active during only the precharge phase. Furthermore, the pipelined system can feed its output back to the input to form an iterative structure. Such a feedback pipeline is viewed as a "loop" or "ring" of logic which circulates data until the entire computation is complete.Type: GrantFiled: October 10, 1990Date of Patent: June 9, 1992Assignee: HaL Computer Systems, Inc.Inventor: Ted E. Williams
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Patent number: D685446Type: GrantFiled: October 17, 2011Date of Patent: July 2, 2013Inventor: Ted E. Williams