Patents by Inventor Ted Hong

Ted Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for estimation of delays and slews during circuit optimization
    Patent number: 9507903
    Abstract: A method for the simulation of a circuit is disclosed. The method may include the determination of parasitic circuit elements, and the determination of one or more operational parameters dependent upon at least the parasitic circuit elements. A model of the parasitic circuit elements may then be generated based upon the one or more operational parameters. The circuit may then be simulated using the model of the parasitic circuit elements to determine a performance level of the circuit. At least one active circuit element may be modified in response to determining that the performance level does not meet a goal.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: November 29, 2016
    Assignee: Oracle International Corporation
    Inventors: Ruiming Li, Rajendran Panda, Tong Xiao, Ted Hong, Xiaomi Mao
  • METHOD FOR ESTIMATION OF DELAYS AND SLEWS DURING CIRCUIT OPTIMIZATION
    Publication number: 20160154918
    Abstract: A method for the simulation of a circuit is disclosed. The method may include the determination of parasitic circuit elements, and the determination of one or more operational parameters dependent upon at least the parasitic circuit elements. A model of the parasitic circuit elements may then be generated based upon the one or more operational parameters. The circuit may then be simulated using the model of the parasitic circuit elements to determine a performance level of the circuit. At least one active circuit element may be modified in response to determining that the performance level does not meet a goal.
    Type: Application
    Filed: March 19, 2015
    Publication date: June 2, 2016
    Inventors: Ruiming Li, Rajendran Panda, Tong Xiao, Ted Hong, Xiaomi Mao
  • Scan cell circuit and scan chain consisting of same for test purpose
    Patent number: 6973609
    Abstract: A scan cell circuit for use in an integrated circuit chip is disclosed. The scan cell circuit includes a multiplexer receiving a first signal, a second signal and a selection signal, and outputting one of the first signal and the second signal in response to the selection signal, and a host circuit electrically connected to the multiplexer, receiving and processing an output of the multiplexer, and proceeding an optional output from a first output end and/or a second output end. When the multiplexer selects the second signal to be outputted in response to a specific state of the selection signal, the first signal output end is fixed at a constant level according to the specific state of the selection signal.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: December 6, 2005
    Assignee: VIA Technologies, Inc
    Inventor: Ted Hong
  • Scan cell circuit and scan chain consisting of same for test purpose
    Publication number: 20030135803
    Abstract: A scan cell circuit for use in an integrated circuit chip is disclosed. The scan cell circuit includes a multiplexer receiving a first signal, a second signal and a selection signal, and outputting one of the first signal and the second signal in response to the selection signal, and a host circuit electrically connected to the multiplexer, receiving and processing an output of the multiplexer, and proceeding an optional output from a first output end and/or a second output end. When the multiplexer selects the second signal to be outputted in response to a specific state of the selection signal, the first signal output end is fixed at a constant level according to the specific state of the selection signal.
    Type: Application
    Filed: July 16, 2002
    Publication date: July 17, 2003
    Applicant: VIA Technologies, Inc.
    Inventor: Ted Hong