Abstract: The chip package comprising a package substrate, a circuit layer, a chip and at least one conductive wire is provided. The circuit layer is disposed on a first surface of the substrate, and extends from the first surface to a second surface of the substrate via the inner surface of a slot of the substrate. The chip is disposed on the second surface of the substrate to cover the slot and a portion of the circuit layer. The chip has at least one signal pad and at least one non-signal pad. The non-signal pad is electrically connected to the circuit layer on the second surface. The slot in the substrate exposes the signal pad. One end of the conductive wire passing through the slot is connected to the signal pad while the other end thereof is connected to the circuit layer on the first surface of the substrate.

Abstract: The chip package comprising a package substrate, a circuit layer, a chip and at least one conductive wire is provided. The circuit layer is disposed on a first surface of the substrate, and extends from the first surface to a second surface of the substrate via the inner surface of a slot of the substrate. The chip is disposed on the second surface of the substrate to cover the slot and a portion of the circuit layer. The chip has at least one signal pad and at least one non-signal pad. The non-signal pad is electrically connected to the circuit layer on the second surface. The slot in the substrate exposes the signal pad. One end of the conductive wire passing through the slot is connected to the signal pad while the other end thereof is connected to the circuit layer on the first surface of the substrate.