Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.

Abstract: An example display device includes a universal serial bus interface to couple to a host computing device; and a power delivery controller interconnected with the universal serial bus interface. The power delivery controller is to obtain from a host state register stored at the display device, a current power state of the host computing device responsive to a change in state of the display device from a first power state to a second power state. The power delivery controller is further to send a power delivery protocol message to the host computing device to synchronize a power state of the host computing device to an updated power state corresponding to the second power state when the current power state of the host computing device corresponds to the first power state. The power delivery controller is further to update the host state register to reflect the updated power state.

Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.

Abstract: An example intrusion detection system for a computer includes: an ambient light sensor to detect an increase in ambient light indicative of a housing of the computer being opened; and a super input/output integrated circuit (SIO) to receive a signal from the ambient light sensor indicating that the housing of the computer has been opened.

Abstract: An example peripheral device includes a module interface to receive power and data communication from a computing device. The peripheral device also includes an attachment tab to affix the peripheral device to a lower side of the computing device. The peripheral device further includes a latch to control an engagement of the attachment tab with the computing device. The peripheral device further includes a sensing circuit to detect a change in position of the latch. The peripheral device further includes a controller to, in response to detecting the latch moving from a locked position to an unlocked position, indicate a hot unplug prediction to the computing device via the module interface.

Abstract: An example intrusion detection system for a computer includes: an ambient light sensor to detect an increase in ambient light indicative of a housing of the computer being opened; and a super input/output integrated circuit (SIO) to receive a signal from the ambient light sensor indicating that the housing of the computer has been opened.

Abstract: An example computing device includes a module interface to communicate with a peripheral device. The computing device also includes a hot swapping prediction circuit to detect a physical movement of the computing device and to generate a hot swapping prediction signal based on the detected physical movement. The computing device further includes a processor coupled to the hot swapping circuit. The processor is to, in response to detecting the hot swapping prediction signal from the hot swapping circuit, change a parameter of a peripheral device detection operation to be executed by an operating system of the computing device.

Abstract: An example peripheral device includes a module interface to receive power and data communication from a computing device. The peripheral device also includes an attachment tab to affix the peripheral device to a lower side of the computing device. The peripheral device further includes a latch to control an engagement of the attachment tab with the computing device. The peripheral device further includes a sensing circuit to detect a change in position of the latch. The peripheral device further includes a controller to, in response to detecting the latch moving from a locked position to an unlocked position, indicate a hot unplug prediction to the computing device via the module interface.

Abstract: An example computing device includes a module interface to communicate with a peripheral device. The computing device also includes a hot swapping prediction circuit to detect a physical movement of the computing device and to generate a hot swapping prediction signal based on the detected physical movement. The computing device further includes a processor coupled to the hot swapping circuit. The processor is to, in response to detecting the hot swapping prediction signal from the hot swapping circuit, change a parameter of a peripheral device detection operation to be executed by an operating system of the computing device.