Patents by Inventor Ted Tessier

Ted Tessier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wafer-level interconnect for high mechanical reliability applications
    Patent number: 8754524
    Abstract: An interconnect structure comprises a solder including nickel (Ni) in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The IMC layer comprises a compound of copper and nickel.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 17, 2014
    Assignee: FlipChip International, LLC
    Inventors: Anthony Curtis, Guy F. Burgess, Michael Johnson, Ted Tessier, Yuan Lu
  • WAFER-LEVEL INTERCONNECT FOR HIGH MECHANICAL RELIABILITY APPLICATIONS
    Publication number: 20120146219
    Abstract: An interconnect structure comprises a solder including nickel (Ni) in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The IMC layer comprises a compound of copper and nickel.
    Type: Application
    Filed: February 16, 2012
    Publication date: June 14, 2012
    Applicant: FLIPCHIP INTERNATIONAL, LLC
    Inventors: Anthony Curtis, Guy F. Burgess, Michael Johnson, Ted Tessier, Yuan Lu
  • Wafer-level interconnect for high mechanical reliability applications
    Patent number: 8143722
    Abstract: An interconnect structure comprises a solder including nickel (Ni) and tin (Sn), with the nickel in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The (IMC) layer comprises a compound of copper and nickel.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: March 27, 2012
    Assignee: Flipchip International, LLC
    Inventors: Anthony Curtis, Guy F. Burgess, Michael Johnson, Ted Tessier, Yuan Lu
  • WAFER-LEVEL INTERCONNECT FOR HIGH MECHANICAL RELIABILITY APPLICATIONS
    Publication number: 20080083986
    Abstract: The structure described herein incorporates an interconnect positioned between two spaced electrical contacts. The interconnect comprises a lead (Pb)-free solder alloy consisting essentially of nickel (Ni), tin (Sn), silver (Ag), and copper (Cu). The nickel (Ni) content is sufficient to produce a smooth interfacial IMC layer in an under bump metallurgy (UBM) when disposed between the two contacts. An embodiment of the structure described herein is a device comprising a substrate, an under bump metallurgy (UBM) disposed on the substrate, a bulk solder body disposed on the under bump metallurgy (UBM), and a wafer device connected to the under bump metallurgy (UBM) through the bulk solder body. The bulk solder body comprises of nickel (Ni), tin (Sn), silver (Ag), and copper (Cu). The nickel (Ni) is in a range of 0.01 to 0.20 percent by weight (wt %).
    Type: Application
    Filed: October 4, 2007
    Publication date: April 10, 2008
    Inventors: Anthony Curtis, Guy Burgess, Michael Johnson, Ted Tessier, Yuan Lu