Patents by Inventor Tee Onn Chong

Tee Onn Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6664483
    Abstract: An electronics package comprises an integrated circuit (IC) coupled to an IC substrate in a flip-chip ball grid array (FCBGA) configuration. The IC comprises a high density pattern of interconnect pads around its periphery for coupling to a corresponding pattern of bonding pads on the IC substrate. The substrate bonding pads are uniquely arranged to accommodate a high density of interconnect pads on the IC while taking into account various geometrical constraints on the substrate, such as bonding pad size, trace width, and trace spacing. In one embodiment, the substrate bonding pads are arranged in a zigzag pattern. In a further embodiment, the technique is used for bonding pads on a printed circuit board to which an IC package is coupled. Methods of fabrication, as well as application of the package to an electronic package, an electronic system, and a data processing system, are also described.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: December 16, 2003
    Assignee: Intel Corporation
    Inventors: Tee Onn Chong, Seng Hooi Ong, Robert L. Sankman
  • Publication number: 20020172026
    Abstract: An electronics package comprises an integrated circuit (IC) coupled to an IC substrate in a flip-chip ball grid array (FCBGA) configuration. The IC comprises a high density pattern of interconnect pads around its periphery for coupling to a corresponding pattern of bonding pads on the IC substrate. The substrate bonding pads are uniquely arranged to accommodate a high density of interconnect pads on the IC while taking into account various geometrical constraints on the substrate, such as bonding pad size, trace width, and trace spacing. In one embodiment, the substrate bonding pads are arranged in a zigzag pattern. In a further embodiment, the technique is used for bonding pads on a printed circuit board to which an IC package is coupled. Methods of fabrication, as well as application of the package to an electronic package, an electronic system, and a data processing system, are also described.
    Type: Application
    Filed: May 15, 2001
    Publication date: November 21, 2002
    Applicant: Intel Corporation
    Inventors: Tee Onn Chong, Seng Hooi Ong, Robert L. Sankman
  • Patent number: 6362438
    Abstract: The present invention provides a circuit board with a plated-through hole, wherein a first end of the plated-through hole is electrically attached to a cap formed of conductive material. One or more surface pads terminate on a surface layer of the printed circuit board, and are connected to the cap by one or more vias extending from the cap to the one or more surface pads. In some embodiments, the circuit board is a substrate for mounting an integrated circuit, such as a ball-grid array integrated circuit. The invention includes methods for making the novel circuit board, as well as integrated circuit assemblies comprising the novel circuit board with an integrated circuit mounted thereto.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: March 26, 2002
    Assignee: Intel Corporation
    Inventors: Tee Onn Chong, Chris Baldwin, Chee-Yee Chung