Patents by Inventor Tee Siam Foong

Tee Siam Foong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for a plan-view transmission electron microscopy sample preparation technique for via and contact characterization
    Patent number: 6683304
    Abstract: A method for preparing a transmission electron microscopy (TEM) sample for contact and via characterization. Specifically, one embodiment of the present invention discloses a method where an integrated circuit semiconductor chip (IC chip) is bonded to a piece of glass and attached to a sample holder. Areas of the IC chip are removed by polishing until a region surrounding a particular contact or via is exposed. The piece of glass supports the IC chip during the polishing process. The IC chip is cut using a focused ion beam to create a thin membrane suitable for TEM failure analysis. The thin membrane includes a plan-view cross-section from the particular contact or via. The cross-sectional plan-view is perpendicular to the longitudinal axis of the contact or via.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: January 27, 2004
    Assignee: Chartered Semiconductor Manufacturing Limited
    Inventors: Dai Jiyan, Tee Siam Foong, Tai Chui Lam, Eddie Er, Shailesh Redkar
  • METHOD FOR A PLAN-VIEW TRANSMISSION ELECTRON MICROSCOPY SAMPLE PREPARATION TECHNIQUE FOR VIA AND CONTACT CHARACTERIZATION
    Publication number: 20040004186
    Abstract: A method for preparing a transmission electron microscopy (TEM) sample for contact and via characterization. Specifically, one embodiment of the present invention discloses a method where an integrated circuit semiconductor chip (IC chip) is bonded to a piece of glass and attached to a sample holder. Areas of the IC chip are removed by polishing until a region surrounding a particular contact or via is exposed. The piece of glass supports the IC chip during the polishing process. The IC chip is cut using a focused ion beam to create a thin membrane suitable for TEM failure analysis. The thin membrane includes a plan-view cross-section from the particular contact or via. The cross-sectional plan-view is perpendicular to the longitudinal axis of the contact or via.
    Type: Application
    Filed: July 8, 2002
    Publication date: January 8, 2004
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LIMITED
    Inventors: Dai Jiyan, Tee Siam Foong, Tay Chui Lam, Eddie Er, Shailesh Redkar