Abstract: A battery pack burn-in test system comprising first and second interconnection circuits for electrically interconnecting a first and a second battery pack respectively to the system; a data communication bus for coupling to respective battery management integrated circuits (ICs) of the first and second battery packs; and a system management unit coupled to the data communication bus. The system management unit may control a charging of the first battery pack during a burn-in test from a discharging of the second battery pack.

Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Abstract: An application-specific integrated circuit (ASIC) for use with a programmable I/O module includes programmable circuitry that enables the ASIC to be configured to support various different I/O functions. The ASIC includes a pin interface, a data interface, a digital section, and an analog section. The pin interface supports analog and digital signal communication and the data interface supports digital data communication. The digital section includes registers for storing digital data such as configuration commands, signal control commands, and digital signal information. The analog section is in electrical signal communication with pin interface and digital data communication with the registers.

Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Abstract: An error detector for a pseudo-random bit sequence (PRBS). A plurality of bits of a PRBS are received in a predictor circuit. A comparator compares two of the bits to predict a next bit in the sequence. The predicted next bit is compared with the actual next bit that is received to determine if there is an error in the actual next bit, and if so, the actual next bit is corrected accordingly. The erroneous actual next bit is replaced with the corrected actual next bit and is then used to predict a future actual next bit. A trigger circuit delays correction during initial operation until the predictor contains a bit sequence in which no errors have been detected.

Abstract: An application-specific integrated circuit (ASIC) for use with a programmable I/O module includes programmable circuitry that enables the ASIC to be configured to support various different I/O functions. The ASIC includes a pin interface, a data interface, a digital section, and an analog section. The pin interface supports analog and digital signal communication and the data interface supports digital data communication. The digital section includes registers for storing digital data such as configuration commands, signal control commands, and digital signal information. The analog section is in electrical signal communication with pin interface and digital data communication with the registers.

Abstract: A composition is provided for MOC that contains compounds with the structure wherein R1 is a hydrogen, an alkyl, an alkoxy, or a substituted or unsubstituted aryl group; R2 is an alkyl having greater than 6 carbons, a substituted aryl, or unsubstituted aryl. Preferably these compounds have a low odor intensity. These compounds may be used with other MOC ingredients that act synergistically or additively with them.

Abstract: A composition is provided for MOC that contains compounds with the structure: wherein R1 is a hydrogen, an alkyl, an alkoxy, or a substituted or unsubstituted aryl group; R2 is an alkyl having greater than 6 carbons, a substituted aryl, or unsubstituted aryl. Preferably these compounds have a low odor intensity. These compounds may be used with other MOC ingredients that act synergistically or additively with them.

Abstract: An error detector for a pseudo-random bit sequence (PRBS). A plurality of bits of a PRBS are received in a predictor circuit. A comparator compares two of the bits to predict a next bit in the sequence. The predicted next bit is compared with the actual next bit that is received to determine if there is an error in the actual next bit, and if so, the actual next bit is corrected accordingly. The erroneous actual next bit is replaced with the corrected actual next bit and is then used to predict a future actual next bit. A trigger circuit delays correction during initial operation until the predictor contains a bit sequence in which no errors have been detected.

Abstract: A traffic light system (10) with an impedance matching circuit (14) for electrically coupling an optical assembly (12) to a switched AC power supply (26) is described. The impedance matching circuit (14) has a matching transformer (20), a first resistor chain (22) and a second resistor chain (24). Each resistor chain (22,24) has an input and an output. Each of the inputs is common with a respective electrical node of the matching transformer (20). Each of the outputs is common with a respective supply node provided by the primary windings (18a) of an input transformer (18) of the optical assembly (12).

Abstract: A traffic light system (10) with an impedance matching circuit (14) for electrically coupling an optical assembly (12) to a switched AC power supply (26) is described. The impedance matching circuit (14) has a matching transformer (20), a first resistor chain (22) and a second resistor chain (24). Each resistor chain (22, 24) has an input and an output. Each of the inputs is common with a respective electrical node of the matching transformer (20). Each of the outputs is common with a respective supply node provided by the primary windings (18a) of an input transformer (18) of the optical assembly (12).