Abstract: A Spatial Light Modulator (SLM) includes a Ferroelectric Liquid Crystal (FLC) layer that is contained in a thin gap or cavity between an upper cover glass and a lower Very Large Scale Integration (VLSI) Complementary Metal Oxide Semiconductor (CMOS) chip. The circuits on the VLSI/CMOS chip are wire connected to an underlying substrate member. A selected volume and vertical height of medium and small size solder joints between the VLSI chip and the substrate member produce self aligning of the VLSI chip with the underlying substrate member during solder reflow. These solder joints also produce an upward directed force that urges the VLSI chip in an upward direction away from the substrate member during solder reflow. A selected volume and vertical height of large size solder joints between the substrate member and the cover glass produce a downward directed force that urges the cover glass in a downward direction during solder reflow.