Patents by Inventor Teiji Okamoto

Teiji Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4773026
    Abstract: A picture display memory system with structure for changing over an address selection signal and data input signal fed to a picture memory depending upon whether the picture information is consecutive in the depth direction or is consecutive in the horizontal direction. When the picture information in the depth direction is to be written, the address selection signal is supplied to the picture memory to select a particular bit in the horizontal direction of the picture memory as an address, and the picture information of the depth direction is written into memory as a data input. When the picture information in the horizontal direction is to be written, bits in the horizontal direction are selected in accordance with the data contents of the picture pattern in the horizontal direction, and data stored in a register which stored beforehand the picture information of the depth direction is written into memory as a data input.
    Type: Grant
    Filed: September 26, 1984
    Date of Patent: September 20, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Yasuaki Takahara, Atsuki Edamura, Tetsuya Ikeda, Teiji Okamoto
  • Patent number: 4346472
    Abstract: A code converting circuit of simple construction composed of an exclusive OR circuit and a flip-flop circuit is provided on each of transmitting and receiving sides of a digital data transmission system according to a differential phase shift keying system, to convert two consecutive errors on adjacent bits peculiar to the differential phase shift keying system into only an error on a single bit. As a result, it is not required to employ a code having an excellent error-correcting capacity in the digital data transmission system, and thus a high transmission efficiency is attained by the use of a code which is relatively deficient in error correcting capacity.
    Type: Grant
    Filed: August 7, 1980
    Date of Patent: August 24, 1982
    Assignees: Hitachi, Ltd., Nippon Telegraph & Telephone Public Corporation
    Inventors: Seiei Ohkoshi, Isao Ishikawa, Teiji Okamoto, Nobuo Tsukamoto