Abstract: A method for performing in-situ scan testing of an integrated circuit (IC) device that is coupled to a main memory is described. The IC device has a plurality of functional circuit blocks, a management controller, and a local memory coupled via an interconnect. Test content is preloaded from a host device onto the main memory coupled to the IC device. A utility test program is loaded onto the local memory of the IC device. The management controller executes the utility test program to load the test content from the main memory onto the local memory. The test content is applied to perform scan testing of one or more functional circuit blocks while maintaining functional connectivity of the IC device with the host device.

Abstract: An eye diagram is generated for a digital interface, such as a Serializer/Deserializer (SerDes) interface. A probability map is captured by stepping through a fixed sequence of phase and reference voltage levels and counting a number of highs or lows. The switching of phase includes merely increasing the phase difference rather than performing complex phase/data analysis. The probability map can then be used to generate an eye diagram through simple differentiation. For example, the differentiation between various pixel locations in the probability map can be used to yield the edges of the eye in an eye diagram. The standard Serdes parameters can then be extracted from the eye diagram. The parameters can then be used to determine if the serial connection is problematic.