Patents by Inventor Teja Manjunath

Teja Manjunath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Voltage regulator including a pair of feedback control loops for drive transistor control
    Patent number: 12730468
    Abstract: A low drop-out voltage regulator (LDO) circuit structure includes a drive transistor with first connected to an input voltage node, a second terminal connected to an output voltage node and a voltage divider, and a third terminal (i.e., a control terminal). The structure employs a pair of concurrently operating feedback control loops between a feedback voltage node of the voltage divider and the control terminal to continuously adjust a control voltage applied to the control terminal and thereby reduce ripple of an output voltage (Vout) at the output voltage node. A first feedback control loop includes comparator and a push capacitor connected between the feedback voltage node and the control terminal. The second feedback control loop includes an operational amplifier connected between the feedback voltage node and the control terminal. The first feedback control loop operates a faster speed than the second to quickly initiate the necessary control voltage adjustments.
    Type: Grant
    Filed: March 25, 2024
    Date of Patent: September 8, 2026
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Siva Kumar Chinthu, Suresh Pasupula, Rakesh Chandrakant Pednekar, Teja Manjunath
  • VOLTAGE REGULATOR INCLUDING A PAIR OF FEEDBACK CONTROL LOOPS FOR DRIVE TRANSISTOR CONTROL
    Publication number: 20250298428
    Abstract: A low drop-out voltage regulator (LDO) circuit structure includes a drive transistor with first connected to an input voltage node, a second terminal connected to an output voltage node and a voltage divider, and a third terminal (i.e., a control terminal). The structure employs a pair of concurrently operating feedback control loops between a feedback voltage node of the voltage divider and the control terminal to continuously adjust a control voltage applied to the control terminal and thereby reduce ripple of an output voltage (Vout) at the output voltage node. A first feedback control loop includes comparator and a push capacitor connected between the feedback voltage node and the control terminal. The second feedback control loop includes an operational amplifier connected between the feedback voltage node and the control terminal. The first feedback control loop operates a faster speed than the second to quickly initiate the necessary control voltage adjustments.
    Type: Application
    Filed: March 25, 2024
    Publication date: September 25, 2025
    Inventors: Siva Kumar Chinthu, Suresh Pasupula, Rakesh Chandrakant Pednekar, Teja Manjunath