Patents by Inventor Tejas Dhanajirao Salunkhe

Tejas Dhanajirao Salunkhe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12204407
    Abstract: In described examples, a memory system is accessed by reading a data line and error detection bits for the data line from a first memory. The data line and the error detection bits from the first memory are decoded to determine if an error is present in the data line from the first memory. A copy of the data line and the error detection bits are stored in a second memory. The copy of the data line and error detection bits are read from the second memory. The copy of the data line and error detection bits are decoded to determine if an error is present in the copy of the data line from the second memory.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: January 21, 2025
    Assignee: Texas Instruments Incorporated
    Inventors: Ruchi Shankar, Tejas Dhanajirao Salunkhe, Trevor Charles Jones
  • Publication number: 20230195565
    Abstract: In described examples, a memory system is accessed by reading a data line and error detection bits for the data line from a first memory. The data line and the error detection bits from the first memory are decoded to determine if an error is present in the data line from the first memory. A copy of the data line and the error detection bits are stored in a second memory. The copy of the data line and error detection bits are read from the second memory. The copy of the data line and error detection bits are decoded to determine if an error is present in the copy of the data line from the second memory.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Ruchi Shankar, Tejas Dhanajirao Salunkhe, Trevor Charles Jones