Patents by Inventor Tejaswik K. Indukuri

Tejaswik K. Indukuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190280047
    Abstract: Substrates, assemblies, and techniques for enabling a dual pedestal for resistive random access memory are disclosed herein. For example, in some embodiments, a device may include a substrate, wherein the substrate includes a fill metal, a first pedestal on the substrate, wherein the first pedestal is over the fill metal, and a second pedestal over the first pedestal, where the second pedestal is a bottom electrode for a memory cell. In an example, the first pedestal extends at least a length of the fill metal and the second pedestal extends less than a length of the first pedestal. In addition, the device can include a memory cell over the second pedestal.
    Type: Application
    Filed: September 30, 2016
    Publication date: September 12, 2019
    Applicant: Intel Corporation
    Inventors: Tejaswik K. Indukuri, Ravi Pillarisetty, Elijah V. Karpov, Satyarth Suri
  • Publication number: 20140091467
    Abstract: Described herein are techniques structures related to forming barrier walls, capping, or alloys/compounds such as treating copper so that an alloy or compound is formed, to reduce electromigration (EM) and strengthen metal reliability which degrades as the length of the lines increases in integrated circuits.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: Christopher J. Jezewski, Alan M. Meyers, Kanwal Jit Singh, Tejaswik K. Indukuri, James S. Clarke, Florian Gstrein